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| 型號： | AD9957BSVZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DDS 1GSPS 14BIT IQ 100TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 分辨率（位）： | 14 b |
| 主 fclk： | 1GHz |
| 調(diào)節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 552 (CN2011-ZH PDF) |
| 配用： | AD9957/PCBZ-ND - BOARD EVAL AD9957 QUADRATURE MOD |
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Data Sheet
AD9957
Rev. C | Page 17 of 64
QUADRATURE MODULATION MODE
A block diagram of the AD9957 operating in QDUC mode is
shown in Figure 26; grayed items are inactive. The parallel input
accepts 18-bit I- and Q-words in time-interleaved fashion. That
is, an 18-bit I-word is followed by an 18-bit Q-word, then the
next 18-bit I-word, and so on. One 18-bit I-word and one 18-bit
Q-word together comprise one internal sample. The data assem-
bler and formatter de-interleave the I- and Q-words so that each
sample propagates along the internal data pathway in parallel
fashion. Both I and Q data paths are active; the parallel data
clock (PDCLK) serves to synchronize the input of I/Q data to
the AD9957.
The PROFILE and I/O_UPDATE pins are also synchronous to
the PDCLK.
The DDS core provides a quadrature (sine and cosine) local
oscillator signal to the quadrature modulator, where the
interpolated I and Q samples are multiplied by the respective
phase of the carrier and summed together, producing a
quadrature modulated data stream. This data stream is routed
through the inverse sinc filter (optionally), and the output
scaling multiplier. Then it is applied to the 14-bit DAC to
produce the quadrature modulated analog output signal.
06384-
006
PDCLK
I/Q IN
E
X
T
_P
W
R_DW
N
DAC_RSET
IOUT
TxENABLE
DAC GAIN
OUTPUT
SCALE
FACTOR
θ
IN
VER
SE
S
INC
FILTE
R
CLOCK
FTW
PW
8
SYSCLK
PLL
÷2
CL
O
CK
M
O
DE
REF_CLK
REFCLK_OUT
XTAL_SEL
AD9957
ω
cos (ωt+θ)
sin (ωt+θ)
S
Y
NC_O
UT
S
Y
NC_I
N
P
LL_
LOC
K
P
LL_
LOOP
_
FI
L
T
ER
MA
ST
ER
_
R
ESET
2
O
SK
DDS
AUX
DAC
8-BIT
POWER
DOWN
CONTROL
18
D
AT
A
SSEMB
L
ER
AND
F
O
RM
A
TTE
R
I
Q
IS
QS
BL
ACKF
IN
I
NT
E
R
F
ACE
18
16
IN
VER
SE
CCI
IN
VER
SE
CCI
OSK
INTERNAL CLOCK TIMING AND CONTROL
DAC
14-BIT
CCI
_O
V
F
L
FTW
PW
PARALLEL DATA
TIMING AND CONTROL
RT
RAM
P
R
OFILE
SERIAL I/O
PORT
I/O_
U
P
D
A
TE
PROGRAMMING
REGISTERS
3
I Q
IS QS
HAL
F
-BAND
FI
L
T
ER
S
(4
×
)
CCI
(1×
T
O
63×
)
HAL
F
-BAND
FI
L
T
ER
S
(4
×
)
CCI
(1×
T
O
63×
)
S
DI
O
CS
I/
O
_
R
ESET
S
CL
K
S
DO
Figure 26. Quadrature Modulation Mode
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| AD9957BSVZ-REEL | 功能描述:IC DDS 1GSPS 14BIT IQ 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9957BSVZREEL13 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
| AD9958 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Channel 500 MSPS DDS with 10-Bit DACs |
| AD9958 PCB | 制造商:Analog Devices 功能描述:EVAL BOARD ((NS)) |
| AD9958/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS |
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