參數(shù)資料
型號(hào)： AD9957BSVZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/64頁(yè)
文件大小： 0K
描述： IC DDS 1GSPS 14BIT IQ 100TQFP
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝： 1
分辨率（位）： 14 b
主 fclk： 1GHz
調(diào)節(jié)字寬（位）： 32 b
電源電壓： 1.8V, 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 托盤
產(chǎn)品目錄頁(yè)面： 552 (CN2011-ZH PDF)
配用： AD9957/PCBZ-ND - BOARD EVAL AD9957 QUADRATURE MOD
AD9957
Data Sheet
Rev. C | Page 18 of 64
BLACKFIN INTERFACE (BFI) MODE
A subset of the QDUC mode is the Blackfin interface (BFI)
mode, shown in Figure 27; grayed items are inactive. In this
mode, a separate I and Q serial bit stream is applied to the
baseband data port instead of parallel data-words. The two
serial inputs provide for 16-bit I- and Q-words (unlike the
18-bit words in normal QDUC mode). The serial bit streams
are delivered to the Blackfin interface. The Blackfin interface
converts the 16-bit serial data into 16-bit parallel data to
propagate down the signal processing chain.
The Blackfin interface includes an additional pair of half-band
filters in both I and Q signal paths (not shown explicitly in the
diagram). The two half-band filters increase the interpolation
of the baseband data by a factor of four, relative to the normal
QDUC mode.
The synchronization of the serial data occurs through the
PDCLK signal. In BFI mode, the PDCLK signal is effectively
the bit clock for the serial data.
Note that the system clock is limited to 750 MHz in BFI mode.
06384-
007
PDCLK
I/Q IN
E
X
T
_P
W
R_DW
N
DAC_RSET
IOUT
TxENABLE
DAC GAIN
θ
IN
VER
SE
S
INC
FILTE
R
CLOCK
FTW
PW
8
SYSCLK
PLL
÷2
CL
O
CK
M
O
DE
REF_CLK
REFCLK_OUT
XTAL_SEL
AD9957
ω
cos (ωt+θ)
sin (ωt+θ)
S
Y
NC_O
UT
S
Y
NC_I
N
P
LL_
LOC
K
P
LL_
LOOP
_
FI
L
T
ER
MA
ST
ER
_
R
ESET
2
O
SK
DDS
AUX
DAC
8-BIT
POWER
DOWN
CONTROL
2
D
AT
A
SSEMB
L
ER
AND
F
O
RM
A
TTE
R
I
Q
IS
QS
BL
ACKF
IN
I
NT
E
R
F
ACE
18
16
IN
VER
SE
CCI
IN
VER
SE
CCI
OSK
INTERNAL CLOCK TIMING AND CONTROL
DAC
14-BIT
CCI
_O
V
F
L
O
SK
FTW
PW
PARALLEL DATA
TIMING AND CONTROL
RT
RAM
P
R
OFILE
SERIAL I/O
PORT
I/O_
U
P
D
A
TE
PROGRAMMING
REGISTERS
3
I Q
IS QS
HAL
F
-BAND
FI
L
T
ER
S
(4
×
)
CCI
(1×
T
O
63×
)
HAL
F
-BAND
FI
L
T
ER
S
(4
×
)
CCI
(1×
T
O
63×
)
OUTPUT
SCALE
FACTOR
S
DI
O
CS
I/
O
_
R
ESET
S
CL
K
S
DO
Figure 27. Quadrature Modulation Mode, Blackfin Interface
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AD9957BSVZ-REEL 功能描述:IC DDS 1GSPS 14BIT IQ 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
AD9957BSVZREEL13 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC
AD9958 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Channel 500 MSPS DDS with 10-Bit DACs
AD9958 PCB 制造商:Analog Devices 功能描述:EVAL BOARD ((NS))
AD9958/PCB 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS
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