參數(shù)資料
型號: AD9874ABSTZ
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡
英文描述: SPECIALTY TELECOM CIRCUIT, PQFP48
封裝: PLASTIC, MS-026BBC, LQFP-48
文件頁數(shù): 17/40頁
文件大小: 1682K
代理商: AD9874ABSTZ
REV. A
AD9874
–24–
Based on these characterization curves, a LNA/mixer bias
setting of 3_3 is suitable for most applications since it will
provide the greatest dynamic range in the presence of multiple
unfiltered interferers. However, portable radio applications
demanding the lowest possible power may benefit by changing
the LNA/mixer bias setting based on the received signal
strength power (i.e., RSSI) available from the SSI output data.
For instance, selecting an LNA_Mixer bias setting of 1_2 for
nominal input strength conditions (i.e., <–45 dBm) would
result in 4 mA current savings (i.e., 18% reduction). If the
signal exceeds this level, a bias setting of 3_3 could be
selected. Refer to the Typical Performance Characteristics for
more performance graphs characterizing the LNA and mixer’s
effect upon the AD9874’s noise and linearity performance
under different operating conditions.
0
–1
–2
–3
–5
dB
100
200
300
400
500
–4
FREQUENCY – MHz
–6
–7
–8
LNA_MIXER
1_2 SETTING
LNA_MIXER
3_3 SETTING
Figure 11c. LNA/Mixer Frequency Response vs. Bias Setting
A 16 dB step attenuator is also included within the LNA/
mixer circuitry to prevent large signals (i.e., > –18 dBm)
from overdriving the
-
modulator. In such instances, the
-
modulator will become unstable, thus severely desensitizing
the receiver. The 16 dB step attenuator can be invoked by set-
ting the ATTEN bit (Register 0x03, Bit 7), causing the mixer
gain to be reduced by 16 dB. The 16 dB step attenuator could
be used in applications in which a potential target or blocker
signal could exceed the IF input clip point. Although the LNA
will be driven into compression, it may still be possible to
recover the desired signal if it is FM. Refer to TPC 7c to see
the gain compression characteristics of the LNA and mixer
with the 16 dB attenuator enabled.
Table IX. SPI Registers Associated with LNA/Mixer
Address
Bit
Default
(Hex)
Breakdown
Width
Value
Name
0x00
(7:0)
8
0xFF
STBY
0x01
(7:6)
2
0
LNAB
0x01
(5:4)
2
0
MIXB
0x03
(7)
1
0
ATTEN
BAND-PASS SIGMA-DELTA ( - ) ADC
The ADC of the AD9874 is shown in Figure 12. The ADC
contains a sixth order multibit band-pass -
modulator that
achieves very high instantaneous dynamic range over a narrow
frequency band. The loop filter of the band-pass -
modulator
consists of two continuous-time resonators followed by a discrete-
time resonator, with each resonator stage contributing a pair of
complex poles. The first resonator is an external LC tank, while
the second is an on-chip active RC filter. The output of the LC
resonator is ac-coupled to the second resonator input via 100 pF
capacitors. The center frequencies of these two continuous-time
resonators must be tuned to fCLK/8 for the ADC to function
properly. The center frequency of the discrete-time resonator
automatically scales with fCLK, thus no tuning is required.
TO DIGITAL
FILTER
SC
RESO-
NATOR
NINE-
LEVEL
FLASH
ESL
GAIN
CONTROL
MIXER
OUTPUT
EXTERNAL
LC
fCLK = 13 MSPS TO 26 MSPS
MXOP
MXON
IF2P
IF2N
RC
RESO-
NATOR
DAC1
Figure 12. Equivalent Circuit of Sixth Order
Band-Pass
-
Modulator
Figure 13a shows the measured power spectral density measured
at the output of the undecimated band-pass
-
modulator.
Note that the wide dynamic range achieved at the center fre-
quency, fCLK/8, is achieved once the LC and RC resonators of
the
-
modulator have been successfully tuned. The out-of-
band noise is removed by the decimation filters following
quadrature demodulation.
0
–10
–20
–30
–50
dBFS/NBW
–40
FREQUENCY – MHz
–60
–70
–80
–90
–100
123456789
–2dBFS OUTPUT
fCLK = 18MHz
NBW = 3.3kHz
Figure 13a. Measured Undecimated Spectral Out-
put of
-
Modulator ADC with fCLK = 18 MSPS
and Noise Bandwidth of 3.3 kHz
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