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| 型號： | AD9548BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 37/112頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GEN/SYNCHRONIZR 88LFCSP |
| 產(chǎn)品變化通告： | AD9548 Mask Change 20/Oct/2010 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時(shí)鐘/頻率發(fā)生器，同步器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，Stratum |
| 輸入： | CMOS，LVDS，LVPECL |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 750kHz |
| 電源電壓： | 1.71 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 88-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 88-LFCSP-VQ（12x12） |
| 包裝： | 托盤 |
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AD9548
Data Sheet
Rev. E | Page 30 of 112
REFERENCE SWITCHOVER
An attractive feature of the AD9548 is its versatile reference
switchover capability. The flexibility of the reference switchover
functionality resides in a sophisticated prioritization algorithm
coupled with register-based controls. This scheme provides the
user with maximum control over the state machine that handles
reference switchover.
The main reference switchover control resides in the loop
mode (Address 0x0A01). The user selection mode bits (Register
0x0A01, Bits[4:3]) allow the user to select one of the reference
switchover state machine’s four operating modes, as follows:
Automatic mode (Address A01, Bits[4:3] = 00)
Fallback mode (Address 0A01, Bits[4:3] = 01)
Holdover mode (Address 0A01, Bits[4:3] = 10)
Manual mode (Address 0A01, Bits[4:3] = 11)
In automatic mode, a fully automatic priority-based algorithm
selects which reference is the active reference. When programmed
for automatic mode, the device ignores the user selection reference
bits (Register 0x0A01, Bits[2:0]). However, when programmed for
any of the other three modes, the device makes use of the user
reference bits. These bits specify a particular input reference
(000 = REF A, 001 = REF AA ..., 111 = REF DD).
In fallback mode, the user reference is the active reference
whenever it is valid. Otherwise, the device switches to a new
reference using the automatic, priority-based algorithm.
In holdover mode, the user reference is the active reference
whenever it is valid. Otherwise, the device switches to holdover
mode.
In manual mode, the user reference is the active reference
whether it is valid or not. Note that, when using this mode, the
user must program the reference-to-profile assignment (see
Register 0x0503 to Register 0x0506) as manual for the
particular reference declared as the user reference. The reason is
that if the user reference fails and its redetect timer expires, then
its profile assignment (shown in Table 22) becomes null. This
means that the active reference (user reference) does not have
an assigned profile, which places the AD9548 into an undefined
state.
The user also has the option to force the device directly into
holdover or free-run operation via the user holdover and user
free-run bits (Register 0x0A01, Bit 6 and Bit 5, respectively]). In
free-run mode, the free running frequency tuning word register
(Address 0x0300 to Address 0x0305) defines the DDS output
frequency. In holdover mode, the DDS output frequency
depends on the holdover control settings (see the Holdover
section).
Automatic Priority-Based Reference Switchover
The AD9548 has a two-tiered, automatic, priority-based
algorithm that is in effect for both automatic and fallback
reference switchover. The algorithm relies on the fact that each
reference profile contains both a selection priority and a
promoted priority. The selection and promoted priority values
range from 0 (highest priority) to 7 (lowest priority). The
selection priority determines the order in which references are
chosen as the active reference. The promoted priority is a
separate priority value given to a reference only after it becomes
the active reference.
An automatic reference switchover occurs on failure of the
active reference or when a previously failed reference becomes
valid and its selection priority is higher than the promoted
priority of the currently active reference (assuming that the
automatic or fallback reference switchover is in effect). When
performing an automatic reference switchover, the AD9548
chooses a reference based on the priority settings within the
profiles. That is, the device switches to the reference with the
highest selection priority (lowest numeric priority value). It
does so by using the reference-to-profile table (see Table 22) to
determine the reference associated with the profile exhibiting
the highest priority.
If multiple references share the same profile, then the device
chooses the reference having the lowest index value. For
example, if the A, B, and CC references (Index 0, Index 2, and
Index 5, respectively) share the same profile, then a switchover
to Reference A occurs because Reference A has the lowest index
value. Note, however, that only valid references are included in
switchover of the selection process. The switchover control logic
ignores any reference with a status indication of invalid.
When using multiple differential reference inputs, physically
connect the reference input signal with the highest priority to
the reference input with the lowest index value. For example,
a differential signal on Reference Input B should not have a
priority that exceeds a differential signal on Reference Input A.
A differential reference on Reference Input C should not have a
priority that exceeds a differential signal on Reference Input B,
and a differential signal on Reference Input D should not have a
priority that exceeds a differential signal on Reference Input C.
A differential reference on Reference Input A has no priority
restrictions. Table 23 shows four valid priority settings for four
differential reference inputs.
Table 23. Valid Differential Reference Priority Examples1
Reference
Input A
Reference
Input B
Reference
Input C
Reference
Input D
0
1
2
3
0
3
4
2
3
7
1
Any reference input configured for a CMOS input is exempt from these
considerations.
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| AD9548BCPZ-REEL7 | 功能描述:IC CLOCK GEN/SYNCHRONIZR 88LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| AD9548XCPZ | 制造商:Analog Devices 功能描述: |
| AD9549 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Input Network Clock Generator/Synchronizer |
| AD9549/PCBZ | 制造商:Analog Devices 功能描述:DUAL INPUT NETWORK CLOCK GEN/SYNCHRONIZER - Bulk |
| AD9549A/PCBZ | 功能描述:BOARD EVALUATION FOR AD9549A RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
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