參數(shù)資料
型號(hào): 62371AB
廠(chǎng)商: Intel Corp.
英文描述: multi-function PCI device(多功能PCI設(shè)備)
中文描述: 多功能PCI設(shè)備(多功能的PCI設(shè)備)
文件頁(yè)數(shù): 163/284頁(yè)
文件大小: 1042K
代理商: 62371AB
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E
8.4.9.
82371AB (PIIX4)
163
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
PRELIMINARY
SUMMARY OF DMA TRANSFER SIZES
Table 20 lists each of the DMA device transfer sizes. The column labeled “Current Byte/Word Count Register”
indicates that the register contents represents either the number of bytes to transfer or the number of 16-bit
words to transfer. The column labeled “Current Address Increment/Decrement” indicates the number added to or
taken from the Current Address register after each DMA transfer cycle. The DMA Channel Mode Register
determines if the Current Address Register will be incremented or decremented.
Table 20. DMA Transfer Size
DMA Device Date Size and Word Count
Current Byte/Word Count
Register
Current Address
Increment/Decrement
8-Bit I/O, Count by Bytes
Bytes
1
16-Bit I/O, Count by Words (Address Shifted)
Words
1
8.4.9.1.
Address Shifting When Programmed for 16-Bit I/O Count by Words
PIIX4 maintains compatibility with the implementation of the DMA in the PC AT which used the 82C37. The DMA
shifts the addresses for transfers to/from a 16-bit device count-by-words. Note that the least significant bit of the
Low Page Register is dropped in 16-bit shifted mode. When programming the Current Address Register (when
the DMA channel is in this mode), the Current Address must be programmed to an even address with the
address value shifted right by 1 bit. The address shifting is as follows:
Table 21. Address Shifting in 16-bit I/O DMA Transfers
Output
Address
8-Bit I/O Programmed Address (Ch
0–3)
16-Bit I/O Programmed Address
(Ch 5–7)
(Shifted)
A0
A[16:1]
A[23:17]
A0
A[16:1]
A[23:17]
0
A[15:0]
A[23:17]
NOTES:
The least significant bit of the Page Register is dropped in 16-bit shifted mode.
8.4.10.
AUTOINITIALIZE
By programming a bit in the DMA Channel Mode Register, a channel may be set up as an autoinitialize channel.
When a channel undergoes autoinitialization, the original values of the Current Page, Current Address and
Current Byte/Word Count Registers are automatically restored from the Base Page, Address, and Byte/Word
Count Registers of that channel following TC.
The Base Registers are loaded simultaneously with the Current
Registers by the microprocessor when the DMA channel is programmed and remain unchanged throughout the
DMA service. The mask bit is not set when the channel is in autoinitialize. Following autoinitialize, the channel is
ready to perform another DMA service, without CPU intervention, as soon as a valid DREQ is detected.
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