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參數(shù)資料
| 型號(hào)： | 5962-9162303MXC |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 圖形處理器 |
| 英文描述： | GRAPHICS PROCESSOR, CPGA145 |
| 封裝： | CERAMIC, PGA-145 |
| 文件頁(yè)數(shù)： | 72/98頁(yè) |
| 文件大?。?/td> | 1546K |
| 代理商： | 5962-9162303MXC |
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SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D -- APRIL 1991 -- REVISED SEPTEMBER 2004
74
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251--1443
host-interface-cycle timing requirements (see Note 9 and Figure 43)
34020A-32
34020A-40
NO.
MIN
MAX
MIN
MAX UNIT
23
tsu(AV-CSL)
Setup time, address prior to HCS no longer high
12
10
ns
24
th(CSL-AV)
Hold time, address after HCS low
12
10
ns
25
tw(CSH)
Pulse duration, HCS high
28
25
ns
26
tw(RDH)
Pulse duration, HREAD high
28
25
ns
27
tw(WRH)
Pulse duration, HWRITE high
28
25
ns
28
tsu(RDH-WRL)
Setup time, HREAD high to HWRITE no longer high
28
25
ns
29
tsu(WRH-RDL)
Setup time, HWRITE high to HREAD no longer high
28
25
ns
30
tw(RDL)
Pulse duration, HREAD low
18
15
ns
31
tw(WRL)
Pulse duration, HWRITE low
18
15
ns
32
tsu(CSL-WRH)
Setup time, HCS low to HWRITE no longer low
18
15
ns
33
tsu(RDL-CK2L)
Setup time, HCS low or HREAD low to LCLK2 no longer high
30
25
ns
34
tsu(WRH-CK2L)
Setup time, HWRITE high or HCS high to LCLK2 no longer
high
30
25
ns
35
th(CK2L-RDH)
Hold time, HREAD high after LCLK2 no longer high
0
ns
36
th(CK2L-WRL)
Hold time, HWRITE low after LCLK2 no longer high
ns
37
tsu(RDH-CK2L)
Setup time, HREAD high to LCLK2 no longer high, prefetch
read mode
30§
25§
ns
38
tsu(CSL-RDH)
Setup time, HCS low to HREAD no longer low
18
15
ns
Setup time to ensure recognition of input on this clock edge.
Hold time required to assure response on next clock edge. These values are based on computer simulation and are not tested.
§ When the SMJ34020A is set for block reads, use the deassertion of HREAD to request a local memory cycle at the next sequential address
location.
NOTE 9: Although HCS, HREAD, and HWRITE can be totally asynchronous to the SMJ34020A, cycle responses to the signals are determined
by local memory cycles.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5962-9162304MYA | 制造商:Texas Instruments 功能描述:2ND GENERATION GRAPHICS SIGNAL PROCESSOR - Rail/Tube |
| 5962-9162501HXA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, CLASS H - Rail/Tube |
| 5962-9162501HZA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H - Rail/Tube |
| 5962-9162502HXA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, CLASS H, SLAVE - Rail/Tube |
| 5962-9162502HZA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H, SLAVE - Rail/Tube |
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