- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄208011 > 5962-9162303MXC (TEXAS INSTRUMENTS INC) GRAPHICS PROCESSOR, CPGA145 PDF資料下載
參數(shù)資料
| 型號： | 5962-9162303MXC |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 圖形處理器 |
| 英文描述： | GRAPHICS PROCESSOR, CPGA145 |
| 封裝： | CERAMIC, PGA-145 |
| 文件頁數(shù)： | 3/98頁 |
| 文件大?。?/td> | 1546K |
| 代理商： | 5962-9162303MXC |
第1頁第2頁當前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D -- APRIL 1991 -- REVISED SEPTEMBER 2004
11
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251--1443
transparency
Transparency is a mechanism that allows the surrounding pixels in an array to be specified as invisible. This
is useful for ensuring that only the object and not the rectangle surrounding it are written to the display. The
SMJ34020A provides four transparency modes:
D
No transparency
D
Transparency on result equal zero
D
Transparency on source equal COLOR0
D
Transparency on destination equal COLOR0
D
Refer to the TMS34020 User’s Guide for more information.
I/O registers
The SMJ34020A contains an on-chip block of sixty-four 16-bit locations (mapped into the SMJ34020A’s
memory address space) that are used for I/O control registers. Eight of these are used by the host interface logic
and are not available to the user. Forty-seven I/O registers control parameters necessary to configure the
operation and report status of the following interfaces:
D
Host interface
D
Local memory
D
Video timing
D
Screen refresh
D
External interrupts
D
Internal interrupts
host interface registers
The host interface registers (HSTDATA, HSTADRL, HSTADRH, HSTCTLL, and HSTCTLH) are provided to
facilitate communications between the SMJ34020A and a host processor and maintain compatibility with the
SMJ34010. The registers are mapped into five of the I/O locations accessible to the SMJ34020A.
Two of these registers (HSTCTLL and HSTCTLH) are used to provide control by the host. This control consists
of the passing of interrupt requests, flushing the instruction cache, halting the SMJ34020A, transmitting a
non-maskable interrupt request to the SMJ34020A, enabling emulation interrupts, and setting host access
modes and configurations.
The other three registers are simple read/write registers to allow the SMJ34020A software to leave addresses
for the host at a known location and allow compatibility with some SMJ34010 software.
memory interface control registers
Some of the I/O registers are used to control various local memory interface functions, including:
D
Frequency of DRAM refresh cycles
D
Masking (read/write protection) of individual color planes
D
DRAM row/column addressing configuration
D
Accessing mode (big endian/little endian)
D
Bus fault and retry recovery
video timing and screen refresh
Twenty-eight I/O registers are dedicated to video timing and screen refresh functions. The SMJ34020A can be
configured to drive composite sync or separate sync displays.
In composite sync mode, the SMJ34020A can be set to extract VSYNC and HSYNC from an external CSYNC
or it can be used to generate CSYNC from separate VSYNC and HSYNC inputs. Internally, the SMJ34020A
can be set to preset the horizontal and vertical counts on receipt of an external sync signal. This allows
compensation for any combination of internal and external delays that occur in the video synchronization
process.
The
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 5962H9215308QUX | 32K X 8 STANDARD SRAM, 40 ns, DFP36 |
| 5962H9215306VMX | 32K X 8 STANDARD SRAM, 60 ns, CDIP28 |
| 5962-9309104HYX | 512K X 8 EEPROM 5V MODULE, 200 ns, CDIP32 |
| 5962-9458503H6X | 128K X 32 EEPROM 5V MODULE, 200 ns, CPGA66 |
| 5962-9461115HTX | 512K X 32 MULTI DEVICE SRAM MODULE, 20 ns, CPGA66 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5962-9162304MYA | 制造商:Texas Instruments 功能描述:2ND GENERATION GRAPHICS SIGNAL PROCESSOR - Rail/Tube |
| 5962-9162501HXA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, CLASS H - Rail/Tube |
| 5962-9162501HZA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H - Rail/Tube |
| 5962-9162502HXA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, CLASS H, SLAVE - Rail/Tube |
| 5962-9162502HZA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H, SLAVE - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復。