參數(shù)資料
型號: 5962-9162303MXC
廠商: TEXAS INSTRUMENTS INC
元件分類: 圖形處理器
英文描述: GRAPHICS PROCESSOR, CPGA145
封裝: CERAMIC, PGA-145
文件頁數(shù): 32/98頁
文件大?。?/td> 1546K
代理商: 5962-9162303MXC
SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D -- APRIL 1991 -- REVISED SEPTEMBER 2004
38
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251--1443
cycle timing examples (continued)
The clock stretch is generated by the VLCOL instruction and is indicated by CAS,WE,TR/QE, and SF high
at the falling edge of RAS and SF high at the falling edge of CAS (Figure 17). The data in the COLOR1 register
is output on LAD to be written to a special register on the VRAM that is used in subsequent cycles requiring a
color latch. During the address portion of the cycle, the status on LAD0--LAD3 indicates a color-mask load is
being performed (status code = 0111). Although CAMD, PGMD, and SIZE16 are ignored on this cycle, they
should be held at valid levels as shown.
Q4
Q1
Q2
Q3
Q1
Q2
Q3
Q4
Q1
All-Zero Address
Zero Address
Color Register Data
GI
LAD
CAMD
RCA
ALTCH
RAS
CAS
WE
TR/QE
SF
DDIN
DDOUT
LRDY
PGMD
SIZE16
BUSFLT
R0
R1
Q4
See clock stretch, page 21.
Figure 17. Load-Color-Latch-Cycle Timing
相關(guān)PDF資料
PDF描述
5962H9215308QUX 32K X 8 STANDARD SRAM, 40 ns, DFP36
5962H9215306VMX 32K X 8 STANDARD SRAM, 60 ns, CDIP28
5962-9309104HYX 512K X 8 EEPROM 5V MODULE, 200 ns, CDIP32
5962-9458503H6X 128K X 32 EEPROM 5V MODULE, 200 ns, CPGA66
5962-9461115HTX 512K X 32 MULTI DEVICE SRAM MODULE, 20 ns, CPGA66
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
5962-9162304MYA 制造商:Texas Instruments 功能描述:2ND GENERATION GRAPHICS SIGNAL PROCESSOR - Rail/Tube
5962-9162501HXA 制造商:International Rectifier 功能描述:DC/DC CONVERTER, CLASS H - Rail/Tube
5962-9162501HZA 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H - Rail/Tube
5962-9162502HXA 制造商:International Rectifier 功能描述:DC/DC CONVERTER, CLASS H, SLAVE - Rail/Tube
5962-9162502HZA 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H, SLAVE - Rail/Tube