參數(shù)資料
型號： 28222-13
廠商： Conexant Systems, Inc.
英文描述： ATM Transmitter/Receiver with UTOPIA Interface
中文描述： 自動柜員機(jī)發(fā)射機(jī)/接收機(jī)的UTOPIA接口
文件頁數(shù)： 107/161頁
文件大?。?/td> 1832K
代理商： 28222-13
CN8223
3.0 Registers
ATM Transmitter/Receiver with UTOPIA Interface
3.5 Receive Control Registers
100046C
Conexant
3-21
Receive Port X ATM Header Match Value
—
Octet 2
0x15
–
0x1C
—
HDR_VALx_12, HDR_VALx_34 (Receive Header Value Register)
The Receive Header Value registers for port x (where x can be 0 to 3) are located at addresses 0x15
–
0x1C. The
header values direct ATM cells to each port. If an incoming ATM cell header matches the value in the header
register, the cell is directed to that port. Receive Header Mask registers further qualify ATM cell reception.
Table 3-9
defines the HDR_VALx register addresses.
Table 3-9. HDR_VALx Register Addresses
Address
Register Name
Description
0x15
HDR_VAL0_12
Receive Port 0 ATM Header Value
—
Octets 1, 2
0x16
HDR_VAL0_34
Receive Port 0 ATM Header Value
—
Octets 3, 4
0x17
HDR_VAL1_12
Receive Port 1 ATM Header Value
—
Octets 1, 2
0x18
HDR_VAL1_34
Receive Port 1 ATM Header Value
—
Octets 3, 4
0x19
HDR_VAL2_12
Receive Port 2 ATM Header Value
—
Octets 1, 2
0x1A
HDR_VAL2_34
Receive Port 2 ATM Header Value
—
Octets 3, 4
0x1B
HDR_VAL3_12
Receive Port 3 ATM Header Value
—
Octets 1, 2
0x1C
HDR_VAL3_34
Receive Port 3 ATM Header Value
—
Octets 3, 4
HDR_VAL0_12, HDR_VAL1_12, HDR_VAL2_12, HDR_VAL3_12
Bit
Field
Size
Name
Description
15
–
8
8
Header Value
—
Octet 1
Receive Port X ATM Header Match Value
—
Octet 1
7
–
0
8
Header Value
—
Octet 2
HDR_VAL0_34, HDR_VAL1_34, HDR_VAL2_34, HDR_VAL3_34
Bit
Field
Size
Name
Description
15
–
8
8
Header Value
—
Octet 3
Receive Port X ATM Header Match Value
—
Octet 3
7
–
0
8
Header Value
—
Octet 4
Receive Port X ATM Header Match Value
—
Octet 4
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