參數(shù)資料
型號： 28222-13
廠商： Conexant Systems, Inc.
英文描述： ATM Transmitter/Receiver with UTOPIA Interface
中文描述： 自動柜員機發(fā)射機/接收機的UTOPIA接口
文件頁數(shù)： 104/161頁
文件大?。?/td> 1832K
代理商： 28222-13
3.0 Registers
CN8223
3.4 Transmit Control Registers
ATM Transmitter/Receiver with UTOPIA Interface
3-18
Conexant
100046C
Transmit Port 2 ATM Header Value - Octets 1, 2
0x2A
—
IDLE_PAY (Transmit Idle Cell Payload Register)
The IDLE_PAY register is located at address 0x2A. This register sets the ATM idle cell payload contents.
0x0C
–
0x13
—
TX_HDRx_12, TX_HDRx_34 (Transmit Header Registers)
The Transmit Header registers for port x (where x can be 0 to 3) are located at addresses 0x0C
–
0x13. These
registers control the header value that is inserted in cells that are transmitted from port x. Cell generation is
described in detail in
Section 2.6
.
Table 3-8
defines the Tx_HDRx Register addresses.
Bit
Field
Size
Name
Description
15
–
9
7
Reserved
Set to 0.
8
1
Enable Idle Cell CRC
Insertion
Allows the CRC-10 value to be calculated and inserted into the last 10 bits of each
transmitted idle cell. Normally written to 0.
7
–
0
8
Idle Cell Payload
Octet
Inserted into each of the 48 octets of the information field in all idle cells
transmitted. Normally written to 6A.
Table 3-8. Tx_HDRx Register Addresses
Address
Register Name
Description
0x0C
TX_HDR0_12
Transmit Port 0 ATM Header Value - Octets 1, 2
0x0D
TX_HDR0_34
Transmit Port 0 ATM Header Value - Octets 3, 4
0x0E
TX_HDR1_12
Transmit Port 1 ATM Header Value - Octets 1, 2
0x0F
TX_HDR1_34
Transmit Port 1 ATM Header Value - Octets 3, 4
0x10
TX_HDR2_12
0x11
TX_HDR2_34
Transmit Port 2 ATM Header Value - Octets 3, 4
0x12
TX_HDR3_12
Transmit Port 3 ATM Header Value - Octets 1, 2
0x13
TX_HDR3_34
Transmit Port 3 ATM Header Value - Octets 3, 4
Bit
Field
Size
Name
Description
15
–
8
8
Header Value
—
Octet 1
Transmit Port X ATM Header Value
—
Octet 1
7
–
0
8
Header Value
—
Octet 2
Transmit Port X ATM Header Value
—
Octet 2
Bit
Field
Size
Name
Description
15
–
8
8
Header Value
—
Octet 3
Transmit Port X ATM Header Value
—
Octet 3
7
–
0
8
Header Value
—
Octet 4
Transmit Port X ATM Header Value
—
Octet 4
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