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| 型號(hào)： | TSB42AB4PGE |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| 中文描述： | 1394消費(fèi)電子產(chǎn)品鏈路層控制器 |
| 文件頁(yè)數(shù)： | 66/183頁(yè) |
| 文件大?。?/td> | 798K |
| 代理商： | TSB42AB4PGE |
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51
5 ceLynx Data Formats
The data formats for transmission and reception of data are shown in the following sections. The transmit
format describes the expected organization of data presented to ceLynx at the MCIF or HSDIx interface.
The receive formats describe the data format that ceLynx presents to the MCIF or the HSDIx interface.
5.1
Asynchronous Transmit
Asynchronous transmit refers to the use of any of the configurable partitions in the 8-Kbyte data buffer.
These buffers can be accessed by the HSDIx or the MCIF. There are two basic formats for transmitted
asynchronous data. The first is for quadlet packets, and the second is for block packets.
The MCIF can access the data buffers through registers DB(N)ACC0 and DB(N)ACC1. All quadlets except
the last must be written to DB(N)ACC0. The last quadlet must be written to DB(N)ACC1. The application
can also transmit asynchronous data through the HSDI. The application must read out an entire packet from
the same buffer using a single interface.
ceLynx can automatically provide the asynchronous 1394 transmit headers on packets transmitted through
the data buffer (ee Note). In this case, the application must only supply the raw asynchronous data to the
data buffer. The microcontroller can program the headers through the TXDP(N)H0TXDP(N)H3 registers
for the associated buffers. The format of these registers must match the formats described in Figure 52
and Figure 53.
NOTE:
Acknowledges for packets transmitted are received in the ACK tracking buffer. See
Section 53,
Asynchronous Acknowledge Buffer
, for more information.
ceLynx can only automatically insert asynchronous transmit headers for packets
with payload data. These include tCodes listed in Table 52.
If ceLynx does not supply the headers, the application must include the headers with the data before
transmit. In this case, the application must supply all of the headers and data in the formats described in
Figure 52 and Figure 53.
Table 51. Asynchronous Transmit Header Insert
ASYNCHRONOUS TRANSMIT HEADERS
REGISTERS USED FOR
HEADER INSERT
DEFAULT ASYNCHRONOUS
TRANSMIT VALUES
Speed/tLabel/rt/tCode/priority
TXDP(N)H0
0000 0000
Destination ID/Destination OffsetHi
TXDP(N)H1
0000 0000
Destination OffsetLow
TXDP(N)H2
0000 0000
Data Length/extended tcode (for block packets)
See Figure 51, Figure 52, Figure 53, and Figure 54 for exact header format.
TXDP(N)H3
0000 0000
Table 52. tCodes Supported for Asynchronous Automatic Header Insertion
tCode
MEANING
0
Write request for data quadlet
1
Write request for data block
6
Read response for data quadlet
7
Read response for data block
9
Lock request
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