參數(shù)資料
型號(hào): TP3410J304
英文描述: IC-ISDN TRANSCEIVER
中文描述: 集成電路- ISDN的收發(fā)器
文件頁數(shù): 6/32頁
文件大?。?/td> 332K
代理商: TP3410J304
Functional Description
(Continued)
TABLE 1. 2B1Q Superframe Format and Overhead Bit Assignments
(a) Network
NT
Framing
1–9
1–18
Sync Word
ISW
SW
SW
SW
SW
SW
SW
SW
ISW
12x(2B+D)
10–117
19–234
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
Overhead Bits (M
1
–M
6
)
119s
237
M
3
eoca
3
eoci
2
eoci
5
eoci
8
eoca
3
eoci
2
eoci
5
eoci
8
Quat Positions
Bit Positions
Basic Frame
#
1
2
3
4
5
6
7
8
1
118s
235
M
1
eoca
1
eocd
m
eoci
3
eoci
6
eoca
1
eocd
m
eoci
3
eoci
6
118m
236
M
2
eoca
2
eoci
1
eoci
4
eoci
7
eoca
2
eoci
1
eoci
4
eoci
7
119m
238
M
4
act
dea
1
1
1
1
uoa
aib
120s
239
M
5
1
1
crc
1
crc
3
crc
5
crc
7
crc
9
crc
11
120m
240
M
6
1
febe
crc
2
crc
4
crc
6
crc
8
crc
10
crc
12
Superframe
#
1
2, 3, …
TABLE 2. 2B1Q Superframe Format and Overhead Bit Assignments
(b) NT
Network
Framing
1–9
1–18
Sync Word
ISW
SW
SW
SW
SW
SW
SW
SW
ISW
12x(2B+D)
10–117
19–234
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
Overhead Bits (M
1
–M
6
)
119s
237
M
3
eoca
3
eoci
2
eoci
5
eoci
8
eoca
3
eoci
2
eoci
5
eoci
8
Quat Positions
Bit Positions
Basic Frame
#
1
2
3
4
5
6
7
8
1
118s
235
M
1
eoca
1
eoc
dm
eoci
3
eoci
6
eoca
1
eoc
dm
eoci
3
eoci
6
118m
236
M
2
eoca
2
eoci
1
eoci
4
eoci
7
eoca
2
eoci
1
eoci
4
eoci
7
119m
238
M
4
act
ps
1
ps
2
ntm
cso
1
1
1
120s
239
M
5
1
1
crc
1
crc
3
crc
5
crc
7
crc
9
crc
11
120m
240
M
6
1
febe
crc
2
crc
4
crc
6
crc
8
crc
10
crc
12
Superframe
#
1
2, 3, …
Note 3:
8 x 1.5 ms Basic Frames = 12 ms/Superframe. NT-to-Network superframe is offset from Network-to-NT superframe by 60
±
2 quats (about 0.75 ms). All bits
other than the Sync Word are scrambled.
Symbols & Abbreviations
act
aib
=
=
start-up bit (= 1 during start-up)
alarm indication bit (= 0 to indicate
interruption)
cyclic redundacy check: covers 2B+D + M
4
1
=
most significant bit
2
=
next significant bit etc.
cold-start-only bit (= 1 to indicate
cold-start-only)
turn off bit (= 0 to announce turn off)
embedded operations channel
a
=
address bits
dm=
data/message indicator (0 = data,
1 = message)
i
=
information (data or message)
crc
=
cso
=
dea
eoc
=
=
febe
=
far end block error bit (= 0 for errored
superframe)
NT in test mode bit (= 0 to indicate test
mode)
power status bits (= 0 to indicate power
problems)
pair of bits forming quaternary symbol
s
=
sign bit (first in quat)
m =
magnitude bit (second in quat)
S-activation-indication bit (= 1 for S/T
activity)
U-only-activation bit (= 1 to activate S/T)
reserved bit for future standard (= 1)
network indicator bit (= 1, reserved for
network use)
user data, bits 19–234 in frame
ntm
=
ps1, ps2 =
Quat
=
sai
=
uoa
“1”
“1
*
=
=
=
2B+D
=
PrintDate=1997/07/09 PrintTime=13:38:03 1109 ds009151 Rev. No. 1
Proof
6
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