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| 型號(hào)： | ST72T631K2M0 |
| 廠(chǎng)商： | 意法半導(dǎo)體 |
| 英文描述： | LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C |
| 中文描述： | 低速USB 8高達(dá)16K的內(nèi)存位微控制器系列，高達(dá)512字節(jié)RAM，8位ADC，水分散粒劑，定時(shí)器，SCI |
| 文件頁(yè)數(shù)： | 75/109頁(yè) |
| 文件大小： | 857K |
| 代理商： | ST72T631K2M0 |
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ST7263
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I2C BUS INTERFACE
(Cont’d)
5.7.4 Functional Description
Refer to the CR, SR1 and SR2 registers in
Section
0.1.7
. for the bit definitions.
By default the I2C interface operates in Slave
mode (M/SL bit is cleared) except when it initiates
a transmit or receive sequence.
5.7.4.1 Slave Mode
As soon as a start condition is detected, the
address is received from the SDA line and sent to
the shift register; then it is compared with the
address of the interface or the General Call
address (if selected by software).
Address not matched
: the interface ignores it
and waits for another Start condition.
Address matched
: the interface generates in se-
quence:
– An Acknowledge pulse is generated if the ACK
bit is set.
– EVF and ADSL bits are set with an interrupt if the
ITE bit is set.
Then the interface waits for a read of the SR1 reg-
ister,
holding the SCL line low
(see
Figure 3
Transfer sequencing EV1).
Next, software must read the DR register to deter-
mine from the least significant bit if the slave must
enter Receiver or Transmitter mode.
Slave Receiver
Following the address reception and after SR1
register has been read, the slave receives bytes
from the SDA line into the DR register via the inter-
nal shift register. After each byte the interface gen-
erates in sequence:
– An Acknowledge pulse is generated if the ACK
bit is set
– EVF and BTF bits are set with an interrupt if the
ITE bit is set.
Then the interface waits for a read of the SR1 reg-
ister followed by a read of the DR register,
holding
the SCL line low
(see
Figure 3
Transfer sequenc-
ing EV2).
Slave Transmitter
Following the address reception and after the SR1
register has been read, the slave sends bytes from
the DR register to the SDA line via the internal shift
register.
The slave waits for a read of the SR1 register fol-
lowed by a write in the DR register,
holding the
SCL line low
(see
Figure 3
Transfer sequencing
EV3).
When the acknowledge pulse is received:
– The EVF and BTF bits are set by hardware with
an interrupt if the ITE bit is set.
Closing Slave Communication
After the last data byte is transferred a Stop Con-
dition is generated by the master. The interface
detects this condition and sets:
– EVF and STOPF bits with an interrupt if the ITE
bit is set.
Then the interface waits for a read of the SR2 reg-
ister (see
Figure 3
Transfer sequencing EV4).
Error Cases
–
BERR
: Detection of a Stop or a Start condition
during a byte transfer. In this case, the EVF and
BERR bits are set with an interrupt if the ITE bit
is set.
If it is a Stop condition, then the interface dis-
cards the data, released the lines and waits for
another Start condition.
If it is a Start condition, then the interface dis-
cards the data and waits for the next slave ad-
dress on the bus.
–
AF
: Detection of a non-acknowledge bit. In this
case, the EVF and AF bits are set with an inter-
rupt if the ITE bit is set.
Note
: In both cases, the SCL line is not held low;
however, the SDA line can remain low due to pos-
sible “0” bits transmitted last. It is then necessary
to release both lines by software.
How to Release the SDA / SCL lines
Set and subsequently clear the STOP bit while
BTF is set. The SDA/SCL lines are released after
the transfer of the current byte.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST72T631K4B1 | 功能描述:8位微控制器 -MCU OTP EPROM 16K USB/SC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST72T631K4M1 | 功能描述:8位微控制器 -MCU OTP EPROM 16K USB/SC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST72T631L4M1 | 制造商:STMicroelectronics 功能描述:8-BIT MICROCONTROLLER - Bulk |
| ST72T632K2B1 | 功能描述:8位微控制器 -MCU OTP EPROM 8K USB/SCI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST72T632K2M1 | 功能描述:8位微控制器 -MCU OTP EPROM 8K USB/SCI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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