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| 型號： | SMJ34020AGB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GRAPHICS SYSTEM PROCESSOR |
| 中文描述： | 圖形系統(tǒng)處理器 |
| 文件頁數(shù)： | 64/92頁 |
| 文件大?。?/td> | 1458K |
| 代理商： | SMJ34020AGB |
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SMJ34020A
GRAPHICS SYSTEMPROCESSOR
SGUS011B – APRIL 1991 – REVISED AUGUST 1995
64
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
signal transition levels (continued)
2.6 V
2 V
1.5 V
1 V
0.6 V
Figure 31. TTL-Level Outputs
TTL-level outputs are driven to a minimum logic-high level of 2.6 V and to a maximum logic-low level of 0.6 V.
For a high-to-low transition on a TTL-compatible output signal, the level at which the output is said to be no
longer high is 2 V, and the level at which the output is said to be low is 1 V. For a low-to-high transition, the level
at which the output is said to be no longer low is 1 V, and the level at which the output is said to be high is 2 V.
A V
OL
trip level of 1.5 V is used for timing requirements for testing at – 55
°
C.
test measurement
The test load circuit shown in Figure 32 represents the programmable load of the tester pin electronics that is
used to verify timing parameters of SMJ34020A output signals.
IOL
VLOAD
IOH
CLOAD
Test
Point
From Output
Under Test
Where:
IOL = 2 mA (all outputs)
IOH = 400
μ
A (all outputs)
VLOAD = 1.5 V
CLOAD = 80 pF typical load circuit capacitance
NOTE: The load applied may be set higher than the values
indicated for IOL and IOH during timing tests in order to
reduce signal bounce induced by the tester hardware.
However the timing performance is assured at the stated
load values.
Figure 32. Test Load Circuit
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相關(guān)代理商/技術(shù)參數(shù) |
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| SMJ34020AGBM32 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
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| SMJ34020AHT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AHTM32 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AHTM40 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
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