- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373427 > SMJ34020AGB (Texas Instruments, Inc.) GRAPHICS SYSTEM PROCESSOR PDF資料下載
參數(shù)資料
| 型號： | SMJ34020AGB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GRAPHICS SYSTEM PROCESSOR |
| 中文描述： | 圖形系統(tǒng)處理器 |
| 文件頁數(shù)： | 46/92頁 |
| 文件大?。?/td> | 1458K |
| 代理商： | SMJ34020AGB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當(dāng)前第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
SMJ34020A
GRAPHICS SYSTEMPROCESSOR
SGUS011B – APRIL 1991 – REVISED AUGUST 1995
46
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
cycle timing examples (continued)
Two SMJ34020As use the multiprocessor interface to pass control of local memory from one to the other
(Figure 19). GSP1 completes a read cycle to the local memory and, although desiring another read, loses the
bus to GSP2, which does a single write cycle (perhaps a host-write access). GSP1 then regains control and
completes the read cycle (shown with a single wait state). Since no further memory-access requests are
present, GSP1 maintains control of the bus and holds all of the local-memory control signals at their inactive
levels. LRDY is a common input to both GSP1 and GSP2.
The host cycle timing diagrams shown in this data sheet are only a sample. For more information, see the
TMS34020 User’s Guide.
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
2
3 4
1
GSP1 Read
GSP2 Write
GSP1 Read With Wait
Bus Idle
GSP1
GI
R0
R1
RAS
CAS
WE
TR/QE
DDIN
DDOUT
ALTCH
LRDY
ALTCH
GI
R0
R1
RAS
CAS
WE
TR/QE
DDIN
DDOUT
GSP2
Figure 19. Multiprocessor-Interface Cycle Timing (Passing Control)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SMJ34020AHT | GRAPHICS SYSTEM PROCESSOR |
| SMJ4256 | 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ4256FV | 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ4256JD | 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ44400 | 1M x 4 DRAM DYNAMIC RANDOM-ACCESS MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SMJ34020AGBM32 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AGBM40 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AHT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AHTM32 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AHTM40 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。