- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365566 > SiI3124ACBHU (Silicon Image, Inc.) PCI-X to Serial ATA Controller PDF資料下載
參數(shù)資料
| 型號： | SiI3124ACBHU |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | PCI-X to Serial ATA Controller |
| 中文描述： | PCI - X到串行ATA控制器 |
| 文件頁數(shù)： | 82/88頁 |
| 文件大?。?/td> | 621K |
| 代理商： | SII3124ACBHU |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁當前第82頁第83頁第84頁第85頁第86頁第87頁第88頁
PCI-X to Serial ATA Controller
Data Sheet
7.3.22 SError
Address Offset: 1F08
H
Access Type: Read/Write 1 Clear
Reset Value: 0x0000_0000
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
82
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
R R R R R
X F T S H C D B W
I
N
R
R
R
R
E
P
C
T
R
R R R R
R
M
I
DIAG
ERR
This register is the SError register as defined by the Serial ATA specification (section 10.1.2).
Bit [31:16]
: DIAG (R/W1C) – This field contains bits defined as shown in the following table. Writing a 1 to the
register bit clears the B, C, F, N, H, W, and X bits. Writing a 1 to the corresponding bits in the Port Interrupt
Status register also clears the F, N, W, and X bits. The B, C, and H bits operate independently of the
corresponding error counter registers; if the error counters are used, these bits should be ignored.
Bit
Definition
Description
B
C
D
10b to 8b decode error
CRC error
Disparity error
Latched decode error or disparity error from the Serial ATA PHY
Latched CRC error from the Serial ATA PHY
N/A, always 0; this error condition is combined with the decode
error and reported as B error
Latched Unrecognized FIS error from the Serial ATA Link
N/A, always 0
Indicates a change in the status of the Serial ATA PHY
Latched Handshake error from the Serial ATA PHY
Always 0
N/A, always 0
N/A, always 0
Latched ComWake status from the Serial ATA PHY
Latched ComInit status from the Serial ATA PHY
F
I
N
H
R
S
T
W
X
Unrecognized FIS type
PHY Internal error
PHYRDY change
Handshake error
Reserved
Link Sequence error
Transport state transition error
ComWake
Device Exchanged
Table 7-9 SError Register Bits (DIAG Field)
Bit [15:00]
: ERR – This field is not implemented; all bits are always 0.
7.3.23 SActive
Address Offset: 1F0C
H
Access Type: Read/Write
Reset Value: N/A
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Active bits
This register provides indirect access of the Port Device QActive registers (see section 7.3.18 for description). It contains
the Active bits used to determine the activity of native queued commands for the selected Port Multiplier port (selection in
SControl). A one in any bit position indicates that the corresponding command is still active in the device.
相關PDF資料 |
PDF描述 |
|---|---|
| SII3132 | PCI Express to 2-Port Serial ATA II Host Controller |
| SII3512 | PCI to Serial ATA Controller |
| SiI3512ECTU128 | PCI to Serial ATA Controller |
| SII3531A | PCI Express to Serial ATA Controller |
| SiI3531ACNU | PCI Express to Serial ATA Controller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SII3132 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI Express to 2-Port Serial ATA II Host Controller |
| SII3132CNU | 制造商:Silicon Image Inc 功能描述:PCI Express to Serial ATA Controller 88-Pin QFN |
| SII3512 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller |
| SII3512ECTU128 | 制造商:Silicon Image Inc 功能描述:PCI to Serial ATA Controller 128-Pin TQFP 制造商:Silicone Image 功能描述: |
| SII3531 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:SteelVine⑩ Host Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復。