參數(shù)資料
型號(hào)： SiI3124ACBHU
廠商： Silicon Image, Inc.
英文描述： PCI-X to Serial ATA Controller
中文描述： PCI - X到串行ATA控制器
文件頁(yè)數(shù)： 35/88頁(yè)
文件大?。?/td> 621K
代理商： SII3124ACBHU
PCI-X to Serial ATA Controller
Silicon Image, Inc.
5.3.8 PACKET Command PRB Structure
Table 5-7 shows the layout for PACKET commands. The Control and protocol override fields must be populated as described
above. The PACKET PRB FIS area is structured the same as a standard ATA command. The FIS area contains the PACKET
ATA command. After the initial PACKET command is transmitted, the device will respond with a “PIO Setup” FIS, requesting a
12 or 16-byte ATAPI command. The host driver must populate the area normally used for the first SGE with the desired
ATAPI command. The length of the ATAPI command is determined by the value of the packet length bit (Port Control, bit 5).
If packet length is 0, 12 bytes will be transmitted. If packet length is one, 16 bytes will be transmitted. The packet length field
must be initialized with the packet length value returned by the device in the IDENTIFY PACKET command. Table 5-7 shows
a representative 12-byte ATAPI command layout.
31
Protocol Override
Received Transfer Count
Features / Error
Command / Status
C
R
Dev/Head
Cyl High
Features (Exp)
Cyl High (Exp)
Cyl Low (Exp)
Device Control
Reserved
Sector Count (Exp)
Reserved
Reserved
Reserved – Must Be Zero
LBA
LBA (MSB)
XFR Length (MSB)
Reserved
Reserved
Reserved
Reserved
Reserved
SGE1 Data Address Low
SGE1 Data Address High
SGE1Data Count
SGE1 TRM
SGE1 LNK
SGE1 DRD
SGE1 XCF
*Highlighted ATAPI packet is an example typical of some commands; other command packets
will have different formats within the highlighted bytes.
Data Sheet
2006 Silicon Image, Inc.
SiI-DS-0160-C
35
0
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
Control
R
Cyl Low
R
PMP
FIS Type
Sector Number
Sector Num (Exp)
Sector Count
Reserved
Reserved
Reserved
LBA (LSB)
Reserved
Reserved
ATAPI opcode
LBA
XFR Length (LSB)
Reserved
Reserved[27:0]
Table 5-7 Port Request Block For PACKET Command
The SiI3124 does not decode the ATAPI command to determine the necessity or direction of any associated data transfer.
The host driver must supply this information by setting control_packet_read (control field, bit4) or control_packet_write (control
field, bit 5) for any PACKET command that requires data transfer. Failure to set one of these bits for an ATAPI command that
requests data transfer will result in an Overrun or Underrun Command Error condition.
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