
PCI-X to Serial ATA Controller
Silicon Image, Inc.
2.2 SATA Interface Timing Specifications
Data Sheet
2006 Silicon Image, Inc.
SiI-DS-0160-C
11
Limits
Typ
Symbol
Parameter
Condition
Min
100
67
Max
273
136
Unit
T
TX_RISE_FALL
Rise and Fall time at
transmitter
Tx Frequecny Long Term
Stability
20%-80% at Gen 1
20%-80% at Gen 2
ps
T
TX_TOL_FREQ
-350
+350
ppm
T
TX_AC_FREQ
Tx Spread-Sprectrum
Modulation Deviation
CLKI = SSC AC
modulation, subject to the
"Downspread SSC"
triangular modulation (30-
33KHz) profile per 6.6.4.5
in SATA 1.0 specification
-5000
+0
ppm
T
TX_SKEW
Tx Differential Skew
15
ps
Table 2-4 SATA Interface Timing Specifications
2.3 SATA Interface Transmitter Output Jitter Characteristics
Limits
Typ
Symbol
Parameter
Condition
Min
Max
Unit
TJ
5UI_15G
Total Jitter, Data-Data 5UI
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Measured at Tx output pins
peak to peak phase variation
Random data pattern
65
ps
DJ
5UI_15G
Deterministic Jitter, Data-
Data 5UI
30
ps
TJ
250UI_15G
Total Jitter, Data-Data
250UI
85
ps
DJ
250UI_15G
Deterministic Jitter, Data-
Data 250UI
40
ps
Table 2-5 SATA Interface Transmitter Output Jitter Characteristics, 1.5 Gb/s
Limits
Typ
Symbol
Parameter
Condition
Min
Max
Unit
TJ
fBAND/10_3G
Total Jitter, f
C3dB
=f
BAUD
/10
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
70
ps
DJ
fBAND/10_3G
Deterministic Jitter,
f
C3dB
=f
BAUD
/10
30
ps
TJ
fBAND/500_3G
Total Jitter, f
C3dB
=f
BAUD
/500
85
ps
DJ
fBAND/500_3G
Deterministic Jitter,
f
C3dB
=f
BAUD
/500
45
ps
Table 2-6 SATA Interface Transmitter Output Jitter Characteristics, 3 Gb/s