參數(shù)資料
型號(hào)： SiI3124ACBHU
廠商： Silicon Image, Inc.
英文描述： PCI-X to Serial ATA Controller
中文描述： PCI - X到串行ATA控制器
文件頁(yè)數(shù)： 20/88頁(yè)
文件大小： 621K
代理商： SII3124ACBHU
PCI-X to Serial ATA Controller
Data Sheet
PCI_INTA_N,
PCI_INTB_N,
PCI_INTC_N,
PCI_INTD_N
PCI_CLK
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
20
V5, W5, W6, Y6
Interrupt.
PCI_INTA_N is asserted to request a system interrupt. The other
interrupt pins may be enabled by means outside that specified by the PCI
specification (see description for Port Interrupt Enable register).
U1
Clock.
PCI_CLK is the reference clock for all PCI interface signals except
PCI_RST_N and PCI_INTA_N.
Reset.
PCI_RST_N initializes the PCI interface and sets internal registers to
their initial state. All PCI outputs are tri-stated while PCI_RST_N is active.
PCI 66 MHz Enable.
PCI_RST_N
U6
M66EN
T20
3.3.2 Flash / I
2
C Pins
Signal Name
FL_ADDR[18:00]
Pin Number(s)
Description
Flash Address.
FL_ ADDR[18:00] is the Flash Memory address for up to 512K
of Flash Memory.
D7, B7, A7, D8, B8,
A8, D9, B9, A9, D10,
B10, A10, D11, B11,
A11, D12, B12, A12,
D13
FL_DATA[07:00]
B13, A13, D14, B14,
A14, D15, B15, A15
A6
B6
D6
D5
B5
Flash Data.
8-bit Flash memory data bus
FL_RD_N
FL_WR_N
FL_CS_N
I2C_SDAT
I2C_SCLK
Flash Read Enable.
Active low
Flash Write Enable.
Active low
Flash Chip Select.
Active low
I
2
C
Serial Data.
Serial Interface (I
2
C) data line
I
2
C
Serial Clock.
Serial Interface (I
2
C) clock
3.3.3 Serial ATA Signals
Signal Name
Rx[3:0]+
Rx[3:0]-
Tx[3:0]+
Tx[3:0]-
XTALI/CLKI
Pin Number(s)
C1, F1, L1, P1
C2, F2, L2, P2
D2, G2, M2, R2
D1, G1, M1, R1
J1
Description
Receive +.
Serial receiver differential signal, positive side.
Receive -.
Serial receiver differential signal, negative side.
Transmit +.
Serial transmitter differential signal, positive side.
Transmit -.
Serial transmitter differential signal, negative side.
Crystal In.
Crystal oscillator pin for SerDes reference clock. When external
clock source is selected, the external clock (either 25MHz or 100 MHz) will
come in through this pin. The clock must be 1.8V swing and the precision
recommendation is ±50ppm.
Crystal Out.
Crystal oscillator pin for SerDes reference clock. A 25MHz crystal
must be used.
External Reference.
External reference resistor pin for termination calibration.
This pin provides the additional function of selecting frequency of the clock
source. For 25MHz, a 1K, 1% resistor is connected to ground. For 100MHz, a
4.99K, 1% resistor is connected to ground.
XTALO
J2
REXT
J4
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