- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365566 > SiI3124ACBHU (Silicon Image, Inc.) PCI-X to Serial ATA Controller PDF資料下載
參數(shù)資料
| 型號： | SiI3124ACBHU |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | PCI-X to Serial ATA Controller |
| 中文描述： | PCI - X到串行ATA控制器 |
| 文件頁數(shù)： | 70/88頁 |
| 文件大?。?/td> | 621K |
| 代理商： | SII3124ACBHU |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁當(dāng)前第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
PCI-X to Serial ATA Controller
Data Sheet
one. This bit is set to one by the Global reset, which is set by a PCI reset, and remains set until cleared by the
host (by writing a one to bit 0 of the Port Control Clear register).
The register bits that are not initialized by the Port Reset are:
OOB Bypass (bit 25) in Port Control (this register)
Port PHY Configuration register (all bits)
7.3.4 Port Status
Address Offset: 1000
H
Access Type: Read
Reset Value: 0x001F_0001
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
70
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
P
Reserved
O
Reserved
Active Slot
L
A
P
I
I
3
S
C
T
R
P
L
I
P
D
P
This register is used to determine the status of various port functions.
Bit [31]
: Port Ready (R). This bit reports the Port Ready status. The transition from 0 to 1 of this bit generates
the Port Ready Interrupt Status (bit 18/2 of the Port Interrupt Status register).
Bit [30:26,24:21]
: Reserved (R). These bits are reserved.
Bit [20:16]
: Active Slot (R). This bit field contains the slot number of the command currently being executed.
When a command error occurs, this bit field indicates the slot containing the command in error.
Bit [25,15:0]
: These bits reflect the current state of the corresponding bits in the Port Control register. Refer to
the Port Control Set register for a complete description.
7.3.5 Port Control Clear
Address Offset: 1004
H
Access Type: Write One To Clear
Reset Value: N/A
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved
O
Reserved
L
A
P
R
3
S
C
T
R
P
L
I
R
P
This register is used to direct various port operations. A one written to a bit position clears that bit in the control register.
Bit [31:26,24:16,12:11,6,2:1]
: Reserved (R). These bits are reserved.
Bit [25,15:13,10:7,5:3,0]
: (W1C) Writing a one to these bits clears the associated bit position of the Port Control
register. Refer to the Port Control Set register for bit descriptions.
7.3.6 Port Interrupt Status
Address Offset: 1008
H
Access Type: Read/Write 1 Clear
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SII3132 | PCI Express to 2-Port Serial ATA II Host Controller |
| SII3512 | PCI to Serial ATA Controller |
| SiI3512ECTU128 | PCI to Serial ATA Controller |
| SII3531A | PCI Express to Serial ATA Controller |
| SiI3531ACNU | PCI Express to Serial ATA Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SII3132 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI Express to 2-Port Serial ATA II Host Controller |
| SII3132CNU | 制造商:Silicon Image Inc 功能描述:PCI Express to Serial ATA Controller 88-Pin QFN |
| SII3512 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller |
| SII3512ECTU128 | 制造商:Silicon Image Inc 功能描述:PCI to Serial ATA Controller 128-Pin TQFP 制造商:Silicone Image 功能描述: |
| SII3531 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:SteelVine⑩ Host Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。