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參數(shù)資料
| 型號： | SBPH400-3 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | IEEE1394 3-Port 400Mbps Physical Layer |
| 中文描述： | IEEE1394連接3端口400Mbps的物理層 |
| 文件頁數(shù)： | 33/43頁 |
| 文件大?。?/td> | 285K |
| 代理商： | SBPH400-3 |
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SBPH400-3
33/43
3
Pin Description
Table 3.1
Pin description - normal operation
Pin name
AGND
AVDD
CLK24
CMC
Pin number
15, 23, 25, 80
6, 24, 26, 79
38
64
I/O
Description
Analog Ground
Analog Supply Voltage
External 24.576 MHz oscillator input (optional, see QX0)
Configuration Manager Contender. Used to initialize the C register
at power-on reset. It should be programmed by connecting it to
V
DD
(C=1) or GND (C=0).
Cable power status.
Control signals for PHY-Link interface
Data signals for PHY-Link interface
Digital Ground
I
I
CPS
CTL[0:1]
D[0:7]
DGND
78
I
46, 45
59 - 51
I/O
I/O
12, 13,14, 27,
28, 29,30, 31,
34, 40,43, 48,
49, 50,61, 69,
70, 72, 73, 74
32, 33, 47, 71
68
DVDD
ISO
Digital Supply Voltage
Link interface isolation logic control. Logic level 1 on this pin
enables the isolation logic, 0 disables the isolation logic (normally
tied to V
DD
or GND as required)
Link Active. Used to initialize the Link Active register on power
reset. It shouldbe programmed byconnecting it to V
DD
(Link Active
= 1) or GND (Link Active = 0).
Link on o/p
Link power status.
Link request to SBPH400
Inputs not used in normal operation, may be connected to V
DD
or
GND, or left unconnected.
Oscillator ground
Oscillator supply voltage
Power Class input
Ports disable. Used to initialize all three ports as disabled on
power-on reset.
24.508 MHz crystal input 0 (optional, see CLK24)
24.508 MHz crystal input 1 (optional, left unconnected if not used,
must not be taken to power or GND)
External resistor for bias current setting
Reset. Taking this signal low causesall activitytocease. When this
signal is taken high, all appropriate registers and outputs are
initialized to their power reset values and a 166
μ
sec bus reset is
initiated.
I
LACT
41
I
LKON
LPS
LREQ
N/C
42
62
44
O
I
I
I
35, 75, 76
OGND
OVDD
PC[0:2]
PDISABLE
37
39
I
I
I
I
65 - 67
63
QX0
QX1
38
36
I
I
R[0:1]
RESET#
22, 21
77
I
2
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