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參數(shù)資料
| 型號： | SBPH400-3 |
| 廠商： | 意法半導體 |
| 英文描述： | IEEE1394 3-Port 400Mbps Physical Layer |
| 中文描述： | IEEE1394連接3端口400Mbps的物理層 |
| 文件頁數(shù)： | 12/43頁 |
| 文件大?。?/td> | 285K |
| 代理商： | SBPH400-3 |
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SBPH400-3
The fields in the Self-ID packet are derived as shown in Table 2.1.
2.7.3 Link_on packet
The SBPH400 will respond to a Link_on packet addressed to it received on the bus. The
packet has the following format:
Figure 2.3
Link_on packet format
If the logical AND of the LPS pin and the Link_active bit is zero, then the SBPH400 will
generate a 6.144 MHz signal on the LKON pin, until this logical value becomes 1. Otherwise
the packet is forwarded to the local link. Note that all Link_on packets received on the bus are
forwarded to the local link if it is active, whether or not the packets are addressed to the local
node.
2.7.4 PHY configuration packet
The SBPH400 will respond to every PHY configuration packet which it receives on the bus, or
from the link device for transmission on the bus. The packet has the format shown in Figure
2.4:
Table 2.1
Self ID packet fields
Field
Derived from
self-ID process or
set_PHY_ID packet
Link enabled register
Gap_Count register
Max_Phy_Speed
(reserved)
Contender register
Power class register
port status for port 0, 1 and
2 respectively
Comment
phy_ID
physical node identifier
L
gap_cnt
sp
rsv
c
pwr
p0, p1 p2
Logical AND of LPS signal and the Link_active register
current value of Gap Count register
10b (S100, S200 and S400 capable)
00b
current value of C register
current value of Power class register
01 - not active (disabled, disconnected or suspended)
10 - active and connected to parent node
11 - active and connected to child node
set whenever the node initiated the current bus reset
i
initiated reset
0 1
phy_ID
logical inverse of first quadlet
0000
0000
0000
0000
0000
0000
2
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