參數(shù)資料
型號： SBPH400-3
廠商： 意法半導體
英文描述： IEEE1394 3-Port 400Mbps Physical Layer
中文描述： IEEE1394連接3端口400Mbps的物理層
文件頁數(shù)： 31/43頁
文件大?。?/td> 285K
代理商： SBPH400-3
SBPH400-3
31/43
timing parameters are given in Table 2.21, and the signal relationships are illustrated in Figure
2.17 and Figure 2.18.
Figure 2.17
PHY-Link reset timing
Figure 2.18
PHY-Link disable timing
Table 2.21
PHY/Link interface reset and disable timing parameters
Symbol
T
LPS_RESET
Parameter
Time for SBPH400 to recognize LPS logically
deasserted and reset the interface
Time for SBPH400 to recognize LPS logically
deasserted and disable the interface
Time to permit the optional differentiator and
isolation circuits to restore during an interface
reset
Unit
μ
s
Min
1.2
Typ
Max
2.75
T
LPS_DIS
μ
s
25
30
T
RESTORE
μ
s
15
20
SCLK
LPS
LPS
(isolated)
CTL
LREQ
DATA
T
LPS_RESET
T
RESTORE
SCLK
LPS
LPS
(isolated)
CTL
LREQ
DATA
T
LPS_DISABLE
T
RESTORE
2
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