參數(shù)資料
型號(hào)： PT7D6555
英文描述： -40V Single P-Channel HEXFET Power MOSFET in a TSOP-6 (Micro 6) package
中文描述： 擴(kuò)展的PCM接口控制器？
文件頁(yè)數(shù)： 6/56頁(yè)
文件大?。?/td> 489K
代理商： PT7D6555
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Preliminary Data Sheet
PT7D6555
Extended PCM Interface Controller
6
PT0105(08/02)
Ver:0
Pin Description
Pin No.
Name
Input (I)
Output (O)
Open
Drain (OD)
I
Function
1
2
7
Vcc
A0
A1
A2
A3
RxD0
RxD1
RxD2
RxD3
TSC0
TSC1
TSC2
TSC3
Supply voltage
: 5 V
18
39
6
5
4
3
8
10
12
14
I/O
Address bus
in the demultiplexed
μ
P interface mode.
I
Receive PCM Interface Data
Time-slot oriented data is received on this pins and forwarded into the downstream
data memory of the PT7D6555.
O
Tristate Control
Supplies a control signal for an external driver. These lines are low when the
corresponding TXD outputs are valid. During reset these lines are high .
9
11
13
15
TxD0
TxD1
TxD2
TxD3
O
Transmit PCM Interface Data
Time slot oriented data is shifted out of the PT7D6555 upstream data memory on
these lines.
For time-slots that are flagged in the tristate data memory or when bit OMDR: PSB
is reset the pins are set to high impedance state.
PCM Interface Frames Synchronization
PCM Interface Data Clock
Single or double data rate.
16
PFS
I
17
PDC
I
19
20
21
22
23
24
25
26
27
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
Address/Data Bus
, multiplexed bus mode.
Transfers addresses from the
μ
P-system to the PT7D6555 and data between the
μ
P
and the PT7D6555.
Data Bus,
demultiplexed bus mode.
Transfers data between the
μ
P and the PT7D6555.
Ground
28
DS/RD
I
Data Strobe
, Motorola bus mode.
A rising edge marks the end of a read or write operation.
Read
, active low, Intel bus mode.
When low a read operation is indicated.
29
R/W/
WR
I
Read/Write
, Motorola bus mode.
When high a valid
μ
P-access identifies a read operation, when low it identifies a
write access.
Write
, active low, Intel bus mode.
When low , a write operation is indicated.
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