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參數(shù)資料
| 型號： | PT7D6555 |
| 英文描述： | -40V Single P-Channel HEXFET Power MOSFET in a TSOP-6 (Micro 6) package |
| 中文描述： | 擴(kuò)展的PCM接口控制器？ |
| 文件頁數(shù)： | 26/56頁 |
| 文件大小： | 489K |
| 代理商： | PT7D6555 |
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Preliminary Data Sheet
PT7D6555
Extended PCM Interface Controller
26
PT0105(08/02)
Ver:0
PCM Interface Registers
PCM-Mode Register (PMOD) Address: 20H(1/0H)
Read/Write
Value after reset: 00000000B
Port 0
TXD0
OUT0
OUT0
Port 1
TXD1
OUT1
tristate
Port 2
TXD2
OUT2
OUT1
Port 3
TXD3
OUT3
tristate
PCM
Mode
0
1
RXD0
IN0
IN0
AIS0=1
TSC0
Val0
Val0
RXD1
IN1
IN0
AIS0=0
TSC1
Val1
AIS0
RXD2
IN2
IN1
AIS1=
1
IN
AIS1=
1
TSC2
Val2
Val1
RXD3
IN3
IN1
AIS1=
0
IN
AIS1=
0
TSC3
Val3
AIS1
2
Not
active
OUT
Val
Not
active
tristate
AIS0
Undef
Undef
tristate
AIS1
7 0
PMD1
PMD0
PCR
PSM
AIS1
AIS0
AIC1
AIC0
PMD1, 0 PCM Mode. Defines the actual number of PCM ports, the data rate range and the data rate stepping.
PMD1, 0
PCM
Mode
0
1
2
Port
Count
4
2
1
Data Rate [kbit/s]
Min.
256
512
1024
Data Rate
Stepping [kbit/s]
256
512
1024
Max.
2048
4096
8192
00
01
10
PCR
PCM Clock Rate.
0
…
single clock rate, data rate is identical with the clock frequency supplied on pin PDC.
1
…
double clock rate, data rate is half the clock frequency supplied on pin PDC.
Note
: Only single clock rate is allowed in PCM-mode 2!
PSM
PCM Synchronization Mode.
A rising edge on PFS synchronizes the PCM frame. PFS is not evaluated directly but is sampled with PDC.
0
…
the external PFS is evaluated with the falling edge of PDC. The internal PFS (internal frame start) occurs with the
next rising edge of PDC.
1
…
the external PFS is evaluated with the rising edge of PDC. The internal PFS (internal frame start) occurs with this
rising edge of PDC.
AIS1..0
Alternative Input Selection.
These bits determine the relationship between the physical pins and the logical port numbers.
The logical port numbers are used when programming the switching functions.
Note: In PCM-mode 0 these bits may not be set!
AIC1
Alternate Input Comparison 1.
0
…
input comparison of port 2 and 3 is disabled
1
…
the inputs of port 2 and 3 are compared
AIC0
Alternate Input Comparison 0.
0
…
input comparison of port 0 and 1 is disabled
1
…
the inputs of port 0 and 1 are compared
Note:
The comparison function is operational in all PCM modes; however, a redundant PCM line which can be switched over
to by means of the PMOD: AIS bits is only available in PCM modes 1 and 2.
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