參數資料
型號： PT7D6555
英文描述： -40V Single P-Channel HEXFET Power MOSFET in a TSOP-6 (Micro 6) package
中文描述： 擴展的PCM接口控制器？
文件頁數： 18/56頁
文件大?。?/td> 489K
代理商： PT7D6555
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Preliminary Data Sheet
PT7D6555
Extended PCM Interface Controller
18
PT0105(08/02)
Ver:0
Operation
The PT7D6555 is principally an intelligent switch of PCM
data between two serial interfaces, the system interface (PCM
interface) and the configurable interface (CFI). Up to 128 chan-
nels per direction can be switched dynamically between the
CFI and the PCM-interfaces. The PT7D6555 performs non-
blocking space and time switching for these channels which
may have a bandwidth of 16, 32, 64 or 128 kbit/s.
Both interfaces can be programmed to operate at different data
rates of up to 8.192 Mbit/s. The PCM interface consists of up
to four duplex ports with a tristate control signal for each out-
put line. The configurable interface can be selected to provide
either four duplex ports or 8 bi-directional (I/O) ports.
The configurable interface incorporates a control block (layer-
1 buffer) which allows the
μ
P to gain access to the control
channels of an IOM (ISDN-Oriented Modular) or SLD (Sub-
scriber Line Data) interface. The PT7D6555 can handle the
layer-1 functions buffering the C/I and monitor channels for
IOM compatible devices and the feature control and signaling
channels for SLD compatible devices. One major application
of the PT7D6555 is therefore as line card controller on digital
and analog line cards. The layer-1 and codec devices are con-
nected to the CFI, which is then configured to operate as IOM-
2, SLD or multiplexed IOM-1 interface.
The configurable interface of the PT7D6555 can also be con-
figured as plain PCM-interface i.e. without IOM- or SLD-frame
structure. Since it
’
s possible to operate the two serial interfaces
at different data rates, the PT7D6555 can then be used to adapt
two different PCM systems.
The PT7D6555 can handle up to 32 ISDN-subscribers with
their 2B + D channel structure or up to 64 analog subscribers
with their 1B channel structure in IOM-configuration. In SLD-
configuration up to 16 analog subscribers can be accommo-
dated.
The system interface is used for the connection to a PCM
backplane. On a typical digital line card, the PT7D6555
switches the ISDN B channels and, if required, also the D chan-
nels to the PCM backplane. Due to its capability to dynami-
cally switch the 16-kbit/s D channel, the PT7D6555 is one of
the fundamental building blocks for networks with either cen-
tral, decentral or mixed signaling and packet data handling
architecture.
PCM-Interface
The serial PCM interface provides up to four duplex ports
consisting each of a data transmit (TXD), a data receive (RXD)
and a tristate control (TSC) line. The transmit direction is also
referred to as the upstream direction, whereas the receive di-
rection is referred to as the downstream direction.
Data is transmitted and received at normal TTL/CMOS-levels,
the output drivers being of the tristate type. Unassigned time
slots may be either be tristated, or programmed to transmit a
defined idle value. The selection of the states
“
high imped-
ance
”
and
“
idle value
”
can be performed with a two-bit resolu-
tion. This tristate capability allows several devices to be con-
nected together for concentrator functions. If the output driver
capability of the PT7D6555 should prove to be insufficient
for a specific application, an external driver controlled by the
TSC can be connected.
The PCM-standby function makes it possible to switch all
PCM-output lines to high impedance with a single command.
Internally, the device still works normally. Only the output
drivers are switched off.
The number of time slots per 8-kHz frame is programmable in
a wide range (from 4 to 128). In other words, the PCM-data rate
can range between 256 kbit/s up to 8.192 Mbit/s. Since the
overall switching capacity is limited to 128 time slots per
direction, the number of PCM-ports also depends on the re-
quired number of time slots: in case of 32 time slots per frame
(2.048 Mbit/s) for example, four highways are available, in
case of 128 time slots per frame (8.192 Mbit/s), only one high-
way is available.
The partitioning between number of ports and number of bits
per frame is defined by the PCM mode. There are three PCM-
modes. The timing characteristics at the PCM interface (data
rate, bit shift, etc.) can be varied in a wide range, but they are
the same for each of the four PCM ports, i.e. if a data rate of
2.048 Mbit/s is selected, all four ports run at this data rate of
2.048 Mbit/s.
The PCM-interface has to be clocked with a PCM Data Clock
(PDC) signal having a frequency equal to or twice the selected
PCM-data rate. In single clock rate operation, a frame consist-
ing of 32 time slots, for example, requires a PDC of 2.048
MHz. In double clock rate operation, however, the same frame
structure would require a PDC of 4.096 MHz.
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