![](http://datasheet.mmic.net.cn/330000/PM73122_datasheet_16444367/PM73122_193.png)
RELEASED
PM73122 AAL1GATOR-32
DATASHEET
PMC-1981419
ISSUE 7
32 LINK CES/DBCES AAL1 SAR PROCESSOR
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
168
Figure 78 Output of E1 Signaling Bits
Channel 0
Channel 1
ABCD
Channel 29
Channel 30
Channel 31
...
...
...
0
1
2
29
30
31
XXXX - indicates signaling is invalid
XXXX
XXXX
XXXX
TL_SER
(timeslots
)
TL_SIG
Line Output Signals During Every Frame
Note:
The AAL1gator-32 treats all 32 timeslots identically. Although E1 data streams
contain 30 timeslots of channel data, 1 timeslot of framing (timeslot 0) and
one time slot that can either be signaling or data (time slot 16), data and
signaling for all 32 timeslots are stored in memory and can be sent and
received in cells.
11.6.3.1
SBI Mode
11.6.3.1.1
SBI Overview
An overview of the SBI bus and the specific details which relate directly to the
AAL1gator-32 will be given here.
11.6.3.1.2
Conventions
The interface where data flows from the Line Interface Block to a Physical Layer
device is the ADD BUS Interface. The interface where data flows from the
Physical Layer device to the Line Interface Block is the DROP BUS Interface.
The term “Link” refers to the link which is multiplexed onto the SBI bus. This is
either a T1, E1, or DS3 signal which is being multiplexed or demultiplexed from
the SBI bus. When a Link is multiplexed within the SBI then it is referred to as a
tributary. Stated another way a link is internal to the AAL1gator while a tributary
is external to the AAL1gator within the SBI bus.
In SBI mode, link and tributary numbering starts at ‘1’.
11.6.3.1.3
General
The Scalable Bandwidth Interconnect (SBI) is a high density 8 bit parallel bus
recommended for interconnection of asynchronous and synchronous physical