![](http://datasheet.mmic.net.cn/330000/PM73122_datasheet_16444367/PM73122_191.png)
RELEASED
PM73122 AAL1GATOR-32
DATASHEET
PMC-1981419
ISSUE 7
32 LINK CES/DBCES AAL1 SAR PROCESSOR
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
166
constant signaling for an entire multi-frame, then the multi-frame sync signal is
not required unless there is a desire to synchronize the multi-frame with the data
across the network. In general this is not necessary.
The AAL1gator-32 reads the signaling nibble for each channel when it reads the
last nibble of each channel’s data. See Figure 75 for an example of a T1 frame.
See Figure 76 for an example of an E1 frame.
Figure 75 Capture of T1 Signaling Bits
Channel 0
Channel 1
ABCD
Channel 21
Channel 22
Channel 23
...
...
...
Line Signals During the Last Frame of a
M ltif
3
1
2
22
23
24
XXXX - indicates signaling is
i
d
XXXX
XXXX
XXXX
RL_SER
(timeslots
)
RL_SIG
Figure 76 Capture of E1 Signaling Bits
Channel 0
Channel 1
ABCD
Channel 29
Channel 30
Channel 31
...
...
...
0
1
2
29
30
31
XXXX - indicates signaling is ignored
XXXX
XXXX
XXXX
RL_SER
(timeslots
)
RL_SIG
Line Signals During the Last Frame of a Multiframe
Note:
AAL1gator-32 treats all 32 timeslots identically. Although E1 data streams
contain 30 timeslots of channel data, 1 timeslot of framing (timeslot 0) and one
time slot that can either be signaling or data (time slot 16), data and signaling for
all 32 timeslots are stored in memory and can be sent and received in cells.
11.6.3 Transmit Direction
In the line transmit direction, for structured data, the Line Interface Block may
take the TL_SYNC input signal and depending on the value of
MF_SYNC_MODE interpret the signal as either a frame pulse or multi-frame
pulse. Alternatively if GEN_SYNC in LIN_STR_MODE memory register is high
for that line, then the Line Interface Block will take the frame pulse or multi-
frame pulse generated by the A1SP Block for the local link and output that signal
to the TL_SYNC[n] pin on the external lines. Whether the Line Interface Block