3.5 Power Saving Modes
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(4) Hardware Standby Mode
s Transition to Hardware Standby Mode
The MB90242A can be placed in hardware standby mode from any mode, by entering an 'L' level
signal at the HSTX pin. In hardware standby mode, oscillator signals are stopped and all external pins
are placed in high impedance state as long as the HSTX signal remains at 'L' level, regardless of any
other modes including reset signals.
In hardware standby mode the contents of RAM are not retained, however a reset may be applied to
initialize dedicated registers having initial value settings.
s Wake-up from Hardware Standby Mode
Hardware standby mode can only be exited by a signal from the HSTX pin. When the HSTX signal
changes to 'H' level, hardware standby mode is exited, the internal reset signal is enabled and then the
MB90242A moves into oscillation stabilization wait mode. After the oscillation stabilization period has
passed, the internal reset is released and the CPU begins operation by executing its own reset sequence.
(5) Oscillation Stabilization Wait Period Settings
The OSC1, OSC0 bits are used to select the length of the oscillation stabilization wait period applied
after wake-up from stop mode and hardware standby mode. The user should select the appropriate wait
period according to the characteristics of oscillator circuits connected to the X0 and X1 pins, as well as
the types of oscillator elements used.
These bits are not initialized by any reset signals other than the power-on reset. At a power-on reset, the
value is initialized to '11.' As a result, the oscillation stabilization wait period at a power-on reset is
17counts of the source oscillation.
(6) Gear Functions
s Machine Clock Switching
Machine clock speeds can be switched by writing values to the CLK1, CLK0 bits in the STBYC
register. The STBYC register signal resets the machine clock frequency divider and the desired
machine clock speed begins with the next machine cycle.
Even when not switching machine clock frequency, unless 16 MHz is selected, the STBYC write cycle
can be used to set the machine clock 4 periods longer than the source oscillation.
s Machine Clock Initialization
The CLK0, CLK1 bits are not initialized by resets from external pins or the RST bit. The initial value
following a reset is '11.'