2.1 CPU
51
Structure of Extended Intelligent I/O Service
Functions related to EI2OS may be divided into 4 basic areas.
Internal resources ................ Interrupt enable bit, interrupt request bit: Controls interrupt request
from internal resources.
Interrupt controller .............. ICR: Assigns interrupt level, determines priority of simultaneous inter-
rupt requests, selects E2OS operations.
CPU ..................................... I, ILM: Compares requested interrupt level with current level, deter-
mines interrupt enable status.
Microcoding: Executes EI2OS processing steps
RAM.................................... Descriptor: Writes IE2OS transfer data
A description of each of the above registers follows.
Interrupt Control Register (ICR)
The interrupt control register (ICR) is located inside the interrupt controller, and supports all I/O
resources that have interrupt functions. For the relation between interrupts and the ICR register, see sec-
tion 2.2.3, "Interrupt Vector Allocation." This register has the following three functions.
Sets interrupt levels for each related internal resource
Determines whether interrupts from related internal resources are to be handled as normal interrupts
or as extended intelligent I/O services
Selects channels for extended intelligent I/O services
Caution: Attempted access to this register by read-modify-write instructions (those instructions indi-
cated by an asterisk (*) in the RMW column in the instruction tables) may result in abnormal operation,
and should be avoided.
Figure 2.1.32 shows the bit configuration of the interrupt control register.
Note:
Caution: The ICS3 to ICS0 bits are effective only when EI2OS has been started. The ISE bit is set to
'1' to start EI2OS, and otherwise set to '0.' If EI2OS has not been started, the ICS0 to ICS3 bits may
have any value.
Fig. 2.1.32 Interrupt Control Register (ICR)
Interrupt control register (ICR) write configuration
Reset : 00000111B
Interrupt control register (ICR) read configuration
Reset : xx000111B
ICS3 ICS2 ICS1 ICS0
ISE
IL2
IL1
IL0
76543210
WW
WWWWWW
––
S1
S0
ISE
IL2
IL1
IL0
76543210
––
RRRRRR