![](http://datasheet.mmic.net.cn/120000/MB90242A_datasheet_3559106/MB90242A_149.png)
2.10External Interrupts
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In the hardware interrupt processing microprogram, the CPU reads the information in the ISE bit from
the interrupt microcontroller to determine that the current request is concerned with interrupt process-
ing, and then branches to the interrupt processing microprogram. The interrupt processing micropro-
gram executes the user-defined interrupt processing program by reading interrupt vector areas and
generating interrupt acknowledge signals to the interrupt controller on the interrupt microcontroller,
and then by transferring to the program counter the jump destination address of the macro command
generated by the vectors.
(2) DTP Operation
Extended intelligent I/O service processing is started with an initialization procedure that sets the I/O
address pointer in the extended intelligent I/O service descriptor to the address of the register allocated
to addresses 000000H to 00FFFFH, and at the same time sets the buffer address pointer to the start
address of the memory buffer.
The DTP operating sequence is entirely identical to external interrupt processing up to the point that the
F2MC-16F CPU starts the hardware interrupt processing microprogram. At this point, the value of the
ISE bit that the F2MC-16F CPU reads within the hardware interrupt processing microprogram indicates
DTP processing, and accordingly control is passed to the extended intelligent I/O service processing
microprogram. When the extended intelligent I/O service starts up, read or write signals are sent with
addressing that designates specific external peripheral resources, and data is transferred to and from the
MB90242A chip. The interrupt request to the MB90242A chip should be dismissed within three
machine cycles after the transfer to or from the external peripheral resources. Once the transfer is com-
plete, the descriptor is updated, and then a signal for clearing the transfer factor is sent to the interrupt
controller. This resource receives the clearing signal, clears the flip-flop setting where the factor has
been stored, and awaits the next request from the signal pin. For a detailed description of extended
intelligent I/O service processing, see the MB90200 Programming Manual.