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參數(shù)資料
| 型號(hào)： | MB90242A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 32 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, SQFP-80 |
| 文件頁(yè)數(shù)： | 157/258頁(yè) |
| 文件大?。?/td> | 2010K |
| 代理商： | MB90242A |
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1.7 Handling of Semiconductor Devices
19
1.7 Handling of Semiconductor Devices
(1) Preventing Latch-Up
A phenomenon called latch-up may occur on CMOS IC devices if voltage higher than Vcc or lower
than Vss is applied to input and output pins, or if voltage exceeding the rated voltage is applied between
Vcc and Vss. When latch-up occurs, supply current levels increase rapidly and can result in thermal
damage to semiconductor elements. Sufficient care must be taken to avoid exceeding maximum rated
values.
For the same reason, care must be taken to ensure that analog power supply levels do not exceed the
level of the digital power supply.
(2) Handling Unused Input Pins
Unused input pins can cause devices to malfunction if left open, and should therefore be pulled up or
down as needed.
(3) Precautions for Use of External Clock
When an external clock is used, the signal should drive the X0 pin only, the X1 pin should be left open.
Figure 1.7.1 shows an example of an external clock connection.
Fig. 1.7.1 Example: Use of an External Clock
(4) Power Supply Pins
When there are multiple Vcc or Vss pins, semiconductor device design requires that in order to prevent
malfunctions such as latch-up, all internal elements of equivalent potential be connected. Also, to pre-
vent abnormal strobe signal operation due to unwanted lowering of emission or increases in ground
level, and to maintain standards for total output current, all elements must be connected to external
power supplies and grounds.
In addition it is recommended that Vcc and Vss of this device be connected with as little impedance as
possible from the current supply source.
It is further recommended that an approx. 0.1 F ceramic capacitor be placed near the device and con-
nected between the Vcc and Vss terminals as a bypass capacitor.
(5) Crystal Oscillator Circuits
Noise in the vicinity of the X0 and X1 pins can be a cause of abnormal operation in this device. Design-
ers should ensure that the X0 and X1 pins, and the crystal (or ceramic) oscillators as well as the bypass
capacitor to ground be placed as close together as possible, and that PC board wiring layouts provide as
little interference as possible from other wiring.
Also, PC board artwork can contribute toward stable of operation by surrounding the X0 and X1 pins
with ground. This is strongly recommended.
X1
X0
MB90242A/MB90V241
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