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參數(shù)資料
| 型號： | M68HC16Y1CFC |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP16 |
| 封裝： | QFP-160 |
| 文件頁數(shù)： | 75/138頁 |
| 文件大?。?/td> | 784K |
| 代理商： | M68HC16Y1CFC |
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MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
41
External ROM emulation is enabled by holding DATA10 and DATA13 low during reset (DATA14 must
be held high during reset to enable the ROM module). While ROM emulation mode is enabled, memory
chip select signal CSM is asserted whenever a valid access to an address assigned to the masked ROM
array is made. The ROM module does not acknowledge IMB accesses while in emulation mode — this
causes the SCIM to run an external bus cycle for each access. See 3.9 Chip Selects and 9 Masked
ROM Module for more information.
3.3.1 System Protection
System protection includes a bus monitor, a halt monitor, a spurious interrupt monitor, and a software
watchdog timer. These functions reduce the number of external components required for a complete
control system.
The system protection control register controls system monitor functions, software watchdog clock
prescaling, and bus monitor timing. In operating modes, this register can be written only once following
power-on or reset, but can be read at any time. In test mode, it is writable at any time.
SWE — Software Watchdog Enable
0 = Software watchdog disabled
1 = Software watchdog enabled
SWP — Software Watchdog Prescale
This bit controls the value of the software watchdog prescaler.
0 = Software watchdog clock not prescaled
1 = Software watchdog clock prescaled by 512
The reset value of SWP is the complement of the state of the MODCLK pin during reset.
SWT[1:0] — Software Watchdog Timing
This field selects the divide ratio used to establish software watchdog time-out period. The following ta-
ble gives the ratio for each combination of SWP and SWT bits.
DBE — Double Bus Fault Enable
0 = Disable double bus fault halt monitor function
1 = Enable double bus fault halt monitor function
BME — Bus Monitor External Enable
SYPCR — System Protection Control Register
$YFFA21
76543210
SWE
SWP
SWT
DBE
BME
BMT
RESET:
1
MODCLK
000000
SWP
SWT
Ratio
000
29
001
211
010
213
011
215
100
218
101
220
110
222
111
224
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