參數(shù)資料
型號: M58WR064KU70ZA6U
廠商: NUMONYX
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封裝: 7.50 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件頁數(shù): 37/122頁
文件大?。?/td> 2187K
代理商: M58WR064KU70ZA6U
M58WRxxxKU, M58WRxxxKL
Bus operations
3.5
Standby
Standby disables most of the internal circuitry allowing a substantial reduction of the current
consumption. The memory is in standby when Chip Enable and Reset are at VIH. The power
consumption is reduced to the standby level and the outputs are set to high impedance,
independently from the Output Enable or Write Enable inputs. If Chip Enable switches to VIH
during a program or erase operation, the device enters standby mode when finished.
3.6
Reset/Power-down
During reset mode the memory is deselected and the outputs are high impedance. The
memory is in reset mode when Reset/Power-down is at VIL. The power consumption is
reduced to the standby level, or to the reset/power-down level if the power-down function is
enabled, independent of the Chip Enable, Output Enable or Write Enable inputs. If
Reset/Power-Down is pulled to VSS during a program or erase, this operation is aborted and
the memory content is no longer valid.
Table 5.
Bus operations
Operation
E
G
W
L
RP
WAIT(1)
1.
WAIT signal polarity is configured using the Set Configuration Register command.
ADQ15-ADQ0
Bus read
VIL
VIH
Data output
Bus write
VIL
VIH
VIL
VIH
Data input
Address latch
VIL
VIH
xVIL
VIH
Address input
Output disable
VIL
VIH
Hi-Z
Standby
VIH
X(2)
2.
X = ‘don't care’
XX
VIH
Hi-Z
Reset/power-
down
XX
X
VIL
Hi-Z
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