參數(shù)資料
型號: LAN9116-MT
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: ROHS COMPLIANT, TQFP-100
文件頁數(shù): 89/126頁
文件大?。?/td> 831K
代理商: LAN9116-MT
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
5.3.23
SMSC LAN9116
89
Revision 1.1 (05-17-05)
DATASHEET
E2P_CMD – EEPROM Command Register
This register is used to control the read and write operations with the Serial EEPROM.
Offset:
B0h
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31
EPC Busy:
When a 1 is written into this bit, the operation specified in the
EPC command field is performed at the specified EEPROM address. This
bit will remain set until the operation is complete. In the case of a read this
means that the host can read valid data from the E2P data register. The
E2P_CMD and E2P_DATA registers should not be modified until this bit is
cleared. In the case where a write is attempted and an EEPROM is not
present, the EPC Busy remains busy until the EPC Time-out occurs. At that
time the busy bit is cleared.
Note:
EPC busy will be high immediately following power-up or reset.
After the EEPROM controller has finished reading (or attempting to
read) the MAC address from the EEPROM the EPC Busy bit is
cleared.
SC
0
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