參數(shù)資料
型號: LAN9116-MT
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: ROHS COMPLIANT, TQFP-100
文件頁數(shù): 44/126頁
文件大?。?/td> 831K
代理商: LAN9116-MT
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
44
SMSC LAN9116
DATASHEET
3.12.1
TX Buffer Format
TX buffers exist in the host’s memory in a given format. The host writes a TX command word into the
TX data buffer before moving the Ethernet packet data. The TX command A and command B are 32-
bit values that are used by the LAN9116 in the handling and processing of the associated Ethernet
packet data buffer. Buffer alignment, segmentation and other packet processing parameters are
included in the command structure. The following diagram illustrates the buffer format.
Note 3.14
Figure 3.13, "TX Buffer Format", shows the TX Buffer as it is written into the LAN9116. It
should be noted that not all of the data shown in this diagram is actually stored in the TX
data FIFO. This must be taken into account when calculating the actual TX data FIFO
usage. Please refer to
Section 3.12.5, "Calculating Actual TX Data FIFO Usage," on
page 48
for a detailed explanation on calculating the actual TX data FIFO usage.
3.12.2
TX Command Format
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command
precedes the data to be transmitted. The TX command is divided into two, 32-bit words; TX command
‘A’ and TX command ‘B’.
There is a 16-bit packet tag in the TX command ‘B’ command word. Packet tags may, if host software
desires, be unique for each packet (i.e., an incrementing count). The value of the tag will be returned
in the RX status word for the associated packet. The Packet tag can be used by host software to
uniquely identify each status word as it is returned to the host.
Figure 3.13 TX Buffer Format
TX Command 'A'
Offset + Data DWORD0
.
.
.
.
.
Last Data & PAD
0
31
1st
2nd
3rd
Last
Host Write
Order
Optional Pad DWORD0
.
.
.
Optional Pad DWORDn
TX Command 'B'
Optional offset DWORD0
.
.
.
Optional offset DWORDn
相關(guān)PDF資料
PDF描述
LP621024D-55LLT 128K X 8 BIT CMOS SRAM
LP621024D-I 128K X 8 BIT CMOS SRAM
LP621024D-T 128K X 8 BIT CMOS SRAM
LP62S1024BM-70LLT 128K X 8 BIT LOW VOLTAGE CMOS SRAM
LP621024DX-55LLI 128K X 8 BIT CMOS SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN9117 制造商:SMSC 制造商全稱:SMSC 功能描述:HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
LAN9117-MD 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN9117-MT 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN9118 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_05 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller