參數(shù)資料
型號： LAN83C175
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 微控制器/微處理器
英文描述： Ethernet CARDBUS Integrated Controller With Modem Support
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝： 28 X 28 MM, 1.40 MM HEIGHT, TQFP-208
文件頁數(shù)： 9/92頁
文件大?。?/td> 299K
代理商： LAN83C175
9
FUNCTIONAL DESCRIPTION
The LAN83C175 EPIC/C is a high-performance
Ethernet network controller designed to interface
directly to the CardBus Local Bus on one side
and to the 802.3 standard Media Independent
Interface (MII) on the other side. The network
interface
can
also
communicate directly with the LAN83C694
10BASE-T transceiver.
be
configured
to
The LAN83C175 implements 802.3 Media
Access Control functions. It is capable of
running at Ethernet rates of both 100 Mbps and
10 Mbps. An MII compliant serial
management interface is provided to control
external media dependent transceivers. The
LAN83C175 is a two channel bus master (one
for transmit, one for receive) capable of
transferring data at the maximum CardBus
transfer rate of 132 Mbps. Buffer format in host
memory is controlled by an independent linked
list structure for each channel.
The LAN83C175's architecture is essentially
broken into two independent transmit and
receive processes which share CardBus bus
and network bandwidth. This architecture is
ideal
for
full-duplex
transmission and reception of frames may occur
simultaneously. An internal arbiter controls
which process has access to the CardBus bus
at a given time (see section on "transmit/receive
arbitration for CardBus bus").
networks
where
The transmit process consists of a DMA
controller, local transmit RAM, memory transfer
unit ("MTU") and CSMA/CD transmit state
machine. The transmit DMA copies packet data
from host memory into the local buffer. When
ready, the memory transfer unit feeds data from
the transmit buffer to the CSMA/CD state
machine, which is responsible for sending data
out on the network under the Ethernet protocol.
When transmission is complete, the transmit
DMA posts the transmit status into host
memory, interrupts the host (optionally) and
looks for the next transmit packet to be queued.
Like the transmit process, the receive process
consists of a DMA controller, local receive RAM,
memory transfer unit and CSMA/CD state
machine. Packets are received by the
CSMA/CD state machine and stored into local
memory by the receive MTU. The receive DMA
then copies the data from the local buffer into
host memory, posts the receive status and
interrupts the host. The LAN83C175 has several
features designed to minimize CPU utilization,
including the optional Receive Look-ahead
Buffering Mode, which eliminates the need to re-
copy the data from one host memory location to
another. Figure 2 on the following page shows
a block diagram of the LAN83C175.
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相關代理商/技術參數(shù)
參數(shù)描述
LAN83C175TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMC Corporation of America 功能描述:83C175TQFP 制造商:SMSC 功能描述:
LAN83C175TQFP WAF 制造商:SMSC 功能描述:
LAN83C180 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 FAST ETHERNET PHY TRANSCEIVER
LAN83C180_01 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
LAN83C180TQFP 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
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