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參數(shù)資料
| 型號(hào)： | LAN83C175 |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Ethernet CARDBUS Integrated Controller With Modem Support |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208 |
| 封裝： | 28 X 28 MM, 1.40 MM HEIGHT, TQFP-208 |
| 文件頁數(shù)： | 31/92頁 |
| 文件大小： | 299K |
| 代理商： | LAN83C175 |
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31
information on each attempted transmission.
Optional operating modes can be selected by
programming the transmit configuration register.
Preamble Generation
At the beginning of each packet, the transmitter
generates 56 bits of preamble (an alternating
'1010' pattern). Following the preamble, a Start
of Frame Delimeter (a '10101011' sequence) is
transmitted.
Transmit Serializer
The transmit serializer converts 8 bits of parallel
data from the transmit buffer to serial or nibble
wide data. The mode of operation is selected
by the MII configuration register. In serial mode,
the transmit data is shifted out of the TXD[0] pin
synchronous to transmit clock. Data is shifted
out least significant bit (LSB) first. In nibble
mode, data is shifted synchronous to the
transmit clock at a one nibble per clock rate.
The data is transmitted least significant nibble
first on pins TXD[3-0]. The LSB is transmitted
on pin TXD[0].
CRC Generator
The transmitter calculates the CRC and
appends it to each packet. CRC data is clocked
out most significant bit (MSB) first. A packet
can be transmitted without an attached CRC
field by programming the transmit descriptor.
This is provided for bridging applications in
which the original checksum must remain
attached to the packet until the final destination.
Transmit Protocol FSM
The transmit protocol FSM controls the
transmission
of
packets
collisions, deferring to active carriers and
collisions, and initiating backoff when needed.
by
monitoring
Interframe Gap and Deference
Deference is initiated when both CRS and COL
have terminated at the end of a packet. The
transmitter deference logic initiates a 2-part
timer at the end of network activity. While this
timer is running, no frame transmission will be
initiated. The first part of the timer (interFrame
SpacingPart1) is used to observe the network
for transmission activity by other stations. If
this station is transmitting, carrier is sensed, or
collision is detected during this part of the timer,
the timer will be reset to zero and held there
until the termination of line activity. When the
first part of the timer elapses, line activity is no
longer observed and the timer runs to
completion.
If any frame is queued up for transmission at
the moment of timer expiration, transmission
will be initiated regardless of line activity.
The combination of interFrame SpacingPart1
and interFrame SpacingPart2 makes up the
Inter-Frame Gap (IFG) as defined by the 802.3
specification.
Collision Handling Logic
When collision is detected by the transmitter
section during the first slot timer of an active
transmission, the transmission terminates after
completion of the preamble and the jam
sequence. The jam sequence is 32 bits of logic
'1's. If collision is detected after the slot time is
passed, the transmission will be aborted after
the jam sequence. An out of window collision
interrupt will be generated and the collision
count status will be retained in the transmit
status register for software collection. After the
software has responded to the interrupt and re-
enabled transmissions, the transmit status will
be cleared and the packet will be automatically
retransmitted.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LAN83C175TQFP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMC Corporation of America 功能描述:83C175TQFP 制造商:SMSC 功能描述: |
| LAN83C175TQFP WAF | 制造商:SMSC 功能描述: |
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| LAN83C180_01 | 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver |
| LAN83C180TQFP | 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver |
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