參數(shù)資料
型號(hào)： LAN83C175
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 微控制器/微處理器
英文描述： Ethernet CARDBUS Integrated Controller With Modem Support
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝： 28 X 28 MM, 1.40 MM HEIGHT, TQFP-208
文件頁(yè)數(shù)： 18/92頁(yè)
文件大?。?/td> 299K
代理商： LAN83C175
18
DWORD 0 - Status
Bit Number and Description
31 through 16 - RECEIVE FRAME LENGTH:
Number of bytes in the received frame.
15 - OWNER: Descriptor ownership bit - set to
“0” when the host owns the descriptor, set to
“1” when the NIC owns the descriptor.
14 - HEADER COPIED: Set when the receive
status is posted after a header copy.
13 - FRAGMENT LIST ERROR: Set when all
buffers in the fragment list have been filled
before the entire receive frame is copied.
12 - NETWORK STATUS VALID: Set when
bits 6 - 0 contain the status from the current
frame and bits 31-16 contain the frame length.
In the case of a header copy or fragment list
error, the receive status from the current
frame may or may not be posted. In all other
cases this bit will be set.
11 through 7 - Reserved
6 - RECEIVER DISABLED: This bit is set
when the receiver is in monitor mode. Always
returns 0.
5 - BROADCAST ADDRESS RECOGNIZED:
This bit is set when a broadcast address has
been recognized.
4 - MULTICAST ADDRESS RECOGNIZED:
This bit is set when a multicast address which
passes the hash filter has been recognized.
3 - MISSED PACKET: This bit is set when a
packet with a recognized address and without
errors (or with masked errors) is not buffered
because the device is in monitor mode. This
bit is also set when the packet overflows the
receive buffer space and cannot be received.
Always returns 0.
2 - CRC ERROR: This bit is set when a frame's
computed CRC does not match the CRC
appended to the frame. If the frame is a runt, this
bit will be clear. In MII mode, this bit will also be
set if receive error was asserted on the MII
interface during reception of the frame.
1 - FRAME ALIGNMENT ERROR: This bit is set
if a CRC error has occurred and the frame is not
byte aligned.
0 - PACKET RECEIVED INTACT: This bit is set
when a packet is received into the buffer space
without error.
DWORD 1 - Data Buffer/Start of Fraglist
Pointer
Bit Number and Description
31 through 0 - Starting address of data buffer or
fragment list in host memory space. Fragment
list must be DWORD aligned. Data buffer may
be aligned on any byte.
DWORD 2 - Control/Data Length (or Frame
Offset)
Bit Number and Description
31 through 19 - Reserved: Must always be set to
0.
18 - HEADER: Indicates that this descriptor is for
a header copy.
17 - LFFORM: Fragment list format - a 1 indicates
that the data length field comes before the
pointer in the fragment list. A 0 indicates that the
pointer comes before the data length.
16 - FRAGLIST: Indicates that this descriptor
points to a fragment list.
15 through 0 - Length of data buffer (when
FRAGLIST = 0) or Offset into frame where copy
begins (when FRAGLIST = 1).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN83C175TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMC Corporation of America 功能描述:83C175TQFP 制造商:SMSC 功能描述:
LAN83C175TQFP WAF 制造商:SMSC 功能描述:
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LAN83C180_01 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
LAN83C180TQFP 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
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