參數(shù)資料
型號: LAN83C175
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: Ethernet CARDBUS Integrated Controller With Modem Support
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝: 28 X 28 MM, 1.40 MM HEIGHT, TQFP-208
文件頁數(shù): 43/92頁
文件大小: 299K
代理商: LAN83C175
43
14 - EEPROM CONTROL
Reset Value: xxx0000
6 - EEPROM SIZE: This read only bit
indicates the size of the external serial
EEPROM (1 = 16x16 or 64x16, 0 = 128x16 or
256x16). The size is selected by an external
“jumper” at power-on reset.
5 - EERDY: This read only bit indicates when
the EEPROM input data is valid and/or when
any of the EEPROM outputs may be changed
(1 = ready, 0 = not ready).
4 - EEDO: DATA output from EEPROM -
Used to read back data from serial EEPROM.
This bit is wired directly to the MD[31] input.
3 - EEDI: Data input to EEPROM - Used to
supply address and data to serial EEPROM.
This bit is muxed onto MA[13] when EEPROM
ENABLE is set.
2 - EESK: EEPROM clock - Used to supply
the clock to the serial EEPROM. The value of
this bit is muxed onto MA[14] when EEPROM
ENABLE is set.
1 - EECS: EEPROM chip select - This bit is
wired directly to the EECS output pin on the
EPIC/C.
0 - EEPROM ENABLE: When this bit is set,
EESK and EEDI are multiplexed onto the MA
pins.
18 - PBLCNT
Reset Value: 000000
5 through 0 - PBLCNT: The value in this register
reflects the maximum number of dwords allowed
to be transferred in a read or write burst. A value
of zero (the reset value) means that the CardBus
burst length is only limited by the amount of
space available in the transmit fifo or the amount
of data in the receive fifo.
20 - CRC ERROR COUNTER
Reset Value: 00000000
31 through 8: Unused.
7 through 0: Reports the number of CRC errors
since the last time this register was read. The
count will stick at 255. When the count reaches
192, the counter overflow interrupt will be set.
The count is cleared when read.
24 - FRAME ALIGNMENT ERROR COUNTER
Reset Value: 00000000
31 through 8: Unused.
7 through 0: Reports the number of frame
alignment errors since the last time this register
was read. The count will stick at 255. When the
count reaches 192, the counter overflow interrupt
will be set. The count is cleared when read.
28 - MISSED PACKET COUNTER
Reset Value: 00000000
31 through 8: Unused.
7 through 0: Reports the number of missed
packet errors since the last time this register was
read. The count will stick at 255. When the count
reaches 192, the counter overflow interrupt will be
set. The count is cleared when read.
相關(guān)PDF資料
PDF描述
LAN83C180 10/100 FAST ETHERNET PHY TRANSCEIVER
LAN83C185 HIGH PERFORMANCE SINGLE CHIP LOW POWER 10/100 ETHERNET PHYSICAL LAYER TRANSCEIVER
LAN83C183-JD FAST ETHERNET PHYSICAL LAYER DEVICE
LAN83C180TQFP 10/100 FAST ETHERNET PHY TRANSCEIVER
LAN83C183 FAST ETHERNET PHYSICAL LAYER DEVICE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN83C175TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMC Corporation of America 功能描述:83C175TQFP 制造商:SMSC 功能描述:
LAN83C175TQFP WAF 制造商:SMSC 功能描述:
LAN83C180 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 FAST ETHERNET PHY TRANSCEIVER
LAN83C180_01 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
LAN83C180TQFP 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver