參數(shù)資料
型號： LAN83C175
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 微控制器/微處理器
英文描述： Ethernet CARDBUS Integrated Controller With Modem Support
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝： 28 X 28 MM, 1.40 MM HEIGHT, TQFP-208
文件頁數(shù)： 11/92頁
文件大?。?/td> 299K
代理商： LAN83C175
11
DMA OPERATION
The software driver controls the transmit and
receive DMA controllers through the I/O control
registers and through "buffer descriptors" in host
memory. There is an independent chain (linked
list) of descriptors for each DMA. Each
descriptor may point to a single data buffer
(which can hold a whole frame or part of a
frame) or to a fragment list, which in turn
contains a list of buffers for an entire frame.
Each descriptor also contains control and status
information and a pointer to the next descriptor.
TRANSMIT DMA
The following diagram shows the format of the
transmit descriptor table:
DWORD 0 - Status
Bit Number and Description
31 through 16: Transmit Length
15 - OWNER: Descriptor ownership bit - set to
0 when the host owns the descriptor, 1 when
the NIC owns the descriptor.
14 and 13 - Reserved.
12 through 8 - COLLISION COUNT: These bits
contain the number of collisions detected while
attempting to transmit the current packet. Bit 12
also indicates transmit abort for excessive
collisions.
7 - DEFERRING: This bit is set when the inter-
frame gap state machine is deferring. If the
PHY has asserted the collision line as a result
of jabber, this bit will stay set indicating the
jabber condition. Always returns 0.
6 - OUT OF WINDOW COLLISION: This bit is
set if a collision is detected more than one slot
time
after
the
start
Transmission is aborted under these conditions.
of
transmission.
5 - COLLISION DETECT HEARTBEAT: This bit
is set to a '1' during transmission of each
packet. It is set to '0' if a collision is detected
within 36 bit times of the end of each packet
transmission. If no collision is detected within
this window, it remains '1'. This bit always
returns zero in full duplex mode.
4 - UNDERRUN: This bit is set when the
transmit DMA is unable to supply the transmitter
enough data to maintain frame transmission.
Always returns 0.
3 - CARRIER SENSE LOST: This bit is set if the
carrier is lost during packet transmission.
Carrier sense is monitored from its rising edge
at the start of the outgoing frame's echo.
Transmission is not aborted upon loss of carrier.
This bit will always return zero in full duplex
mode.
2 - TRANSMITTED WITH COLLISIONS: When
set, this bit indicates the frame collided at least
once with another frame on the network. It is not
set for either out-of-window collisions or
excessive collision aborts.
1 - NON-DEFERRED TRANSMISSION: This bit
is set if the frame is transmitted successfully
without deferring. A deferred transmission can
only occur the first time an attempt is made to
send a packet. Collisions are not deferred
transmissions.
0 - PACKET TRANSMITTED: This bit is set to
indicate transmission of a packet without
excessive collisions or abort.
TX LENGTH TX STATUS
BUFFER ADDRESS
CONTROL
BUF LENGTH
NEXT DESCRIPTOR ADDRESS
31
0
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN83C175TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMC Corporation of America 功能描述:83C175TQFP 制造商:SMSC 功能描述:
LAN83C175TQFP WAF 制造商:SMSC 功能描述:
LAN83C180 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 FAST ETHERNET PHY TRANSCEIVER
LAN83C180_01 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
LAN83C180TQFP 制造商:SMSC 制造商全稱:SMSC 功能描述:10/100 Fast Ethernet PHY Transceiver
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