
L64005 MPEG-2 Audio/Video Decoder Technical Manual
4-13
Final Rev F
Copyright 1996 by LSI Logic Corporation. All rights reserved.
4.4
Elementary
Stream
Decoding
The L64005 video decoder decodes data from the elementary video
stream buffer. Setting the Decode Start bit in the Group 3 register
instructs the L64005 to start decoding. Once the decoder is instructed to
start, it continually decodes pictures at a rate controlled by the frame rate
of the display system. This rate is set either by the L64005 display con-
troller registers (master mode) or by an external sync signal.
Once the system controller instructs the L64005 to start decoding, it
reads the picture header and all syntax down to the slice start code, and
then waits until the next Presentation Unit (PU) boundary before starting
the decode of the picture data. Note that the user and auxiliary data will
be parsed prior to the vertical sync when the picture is actually decoded.
This ensures that the video decode can proceed synchronous to the pic-
ture display rate. It is a necessary condition of the L64005 that video
decode proceed in lock step to the video display so that the minimum
amount of memory is used for picture reconstruction and display.
The L64005 decodes either an MPEG-1 or an MPEG-2 elementary
stream up to Main Prole at Main Level. Stream decoding proceeds auto-
matically once the decoder has started. The user can read header data
from the Elementary Stream Headers from the Auxiliary Data FIFO. User
data, if present, is in the User Data FIFO.
The reconstruction of a PU completes inside a presentation interval. A
presentation interval is one frame time for frame mode coding and two
eld times for eld mode coding. After completing a PU, the decoder
reads the picture header of the following picture, then stops until the next
PU boundary begins—typically by the time next eld boundary begins. If
the host controller requests a freeze frame or freeze eld, the decoder
remains stopped at the PU boundary until the freeze request is released.
Decode does not restart until the next vertical sync.
The decoder skips a frame if the frame skip bits are set when the
decoder reads the picture header, or after the picture header has been
read but the decoder is waiting for the next PU boundary. To be success-
ful a frame skip must complete before the next PU begins. If the skip
does not complete, the next picture will not start on the PU boundary.
This causes a freeze of the preceding eld in the display controller, and
the decoding will not commence until the next PU boundary. During this
time, the external controller may request additional frame skips.