L64005 MPEG-2 Audio/Video Decoder Technical Manual
6-25
Final Rev F
Copyright 1996 by LSI Logic Corporation. All rights reserved.
Cb and Cr values are decimated 2:1 prior to mixing with the decoded
video data. The color palette may be updated once per OSD region. The
OSD controller automatically performs this process during the horizontal
blanking interval. This color expansion feature allows many more colors
to be displayed on the overlay screen at one time.
6.9.1.2 4 Bit/Pixel Mode
Similar to its operation in 2 bit/pixel mode, in 4 bit/pixel mode, the L64005
reads overlay data from the DRAM frame stores and displays it at a rate
of one pixel every two device clocks. Through an on-chip color palette,
the L64005 translates the 4-bit pixel value into a YCbCr color value using
6 bits for Y, and 4 bits each for Cb and Cr. This value allows 16 simulta-
neous colors to be selected from a palette of approximately 16,384 non-
black colors, plus black and transparent. The Cb and Cr values are dec-
imated 2:1 prior to mixing with the decoded video data.
6.9.2
Operation of the
OSD Controller
The L64005 maintains pointers on-chip to two overlay display lists, one
for each eld. These pointers are contained in Group 6, Registers 24
through 27. Refer to
Chapter 2 for descriptions of these registers. These
registers are loaded via the microprocessor interface.
Figure 6.13 illus-
trates the pointers from the OSD eld register to the overlay display lists.
Figure 6.13
Pointers to Overlay
Display Lists
At the beginning of each eld, the OSD controller scans the display list
stored in the DRAM and loads the rst 128 bits into the OSD control reg-
isters. The OSD control registers are not accessible from the micropro-
cessor interface. These registers describe the current OSD region. The
OSD controller then waits until the display controller reaches the rst line
of the OSD region, fetches the bitmap for the OSD region from memory
OSD Field Pointer
Header
Bitmap
Overlay Display Lists