2-24
Registers
Final Rev F
Copyright 1996 by LSI Logic Corporation. All rights reserved.
2.8.2
Group 6
Error Status
Register
When read, the Error Status Register returns the error status of the
decoder. This register is read only. Writing this register has no effect.
Because of the limited amount of redundancy in the MPEG syntax, the
actual error may be different from that agged.
SCRM
System Clock Reference Match
7, R
When set, SCRM indicates that the LSBs of the system
clock reference in the match register is equal to the on-
chip SCR counter.
SCRO
System Clock Reference Overow
6, R
When set, SCRO indicates that the on-chip System Clock
Reference counter has wrapped around. This interrupt
can be used to extend the precision of this counter in
software.
ARE
Audio Reconstruction Error
5, R
If ARE is set, the audio decoder is unable to reconstruct
the output samples in the time available before the
intended presentation time. This usually indicates that the
PCM output is incorrectly programmed. When the audio
decoder sets ARE, it also sets the DER bit in Group 3.
Please note that usually at decode start time a recon-
struction error may occur.
ASE
Audio Sync Error
4, R
When ASE is set, it indicates that the audio decoder has
lost sync. When the audio decoder sets ASE, it also sets
the DER bit in Group 3. Please note that this error may
persist for one or more audio frame times.
ACE
Audio CRC or Illegal Bit Error
3, R
If the CRC check in an audio frame header has failed and
ACE is set, it indicates that there is an illegal syntax in
the audio header, or that this coding mode is unsup-
ported. When the audio decoder sets ACE, it also sets
the DER bit in Group 3. Please note that although the
CRC error may persist for one or more audio frame times,
this bit will only be set once per audio frame. If it is read,
7
6
5
4
3
210
SCRM SCRO ARE ASE
ACE
VRE
CE VLCE
Register 1