1-20
Introduction
Final Rev F
Copyright 1996 by LSI Logic Corporation. All rights reserved.
nents. During normal operation, the L64005 exclusively controls the
external memory frame stores. However, it is possible to access the
external memory through the user port on the L64005 for test, verica-
tion, and access to the overlay stores.
1.5.10
Error
Concealment
The L64005 handles coded channel data that is assumed to be an
MPEG-2 compliant bitstream with excellent error performance. The
L64005 detects data in the bitstream that does not meet MPEG-2 syntax
or grammar rules and can ag the data for exception processing. Hard-
ware error handling is limited to error masking and the application of con-
cealment vectors, or redisplay of the previous frame. The L64005 ags
gross errors in the bitstream that occur because of channel buffer over-
run, channel buffer underrun, or non-conformance in the bitstream. The
L64005 ags the errors so that they may be masked in the display or on
the audio output. An external programmable microcontroller may execute
mechanisms to recover from gross errors.
1.5.11
Mechanical and
Electrical
The L64005 is available in a 160-pin plastic quad at package (PQFP).
LSI Logic manufactures the L64005 with its 0.5 micron, 3.3-V CMOS pro-
cess (Revisions D and prior), and with its 0.35 micron, 3.3-V CMOS pro-
cess (Revision E and later).
1.6
L64005
Overview
The following subsections provide an overview of the L64005. Included
in the following subsections are descriptions of the video decoder, the
on-screen display controller, the audio decoder, and the channel inter-
face. System layer decoding, bitstream syntax and grammar, and the
video output features of the L64005 are also described.
1.6.1
MPEG-2 Video
Decoder
The L64005 is a main level, main prole MPEG-2 decoder. It is fully com-
patible to the MPEG-2 standard, including support for adaptive
eld/frame motion compensation, dual prime motion compensation, con-
cealment motion vectors, alternate block scan, 3:2 pulldown and pan and
scan modes to 1/8 pixel accuracy. The MPEG decoder is based on the
proven L64002 core with these enhancements:
Improved DRAM interface provides the option to use one 1Mx16 syn-
chronous DRAM chips, or four 256Kx16 regular DRAM chips.