參數(shù)資料
型號(hào)： KM4132G512
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 256K x 32Bit x 2 Banks Synchronous Graphic RAM(256K x 32位 x 2組同步圖形 RAM)
中文描述： 256 × 32Bit的× 2銀行同步圖形存儲(chǔ)器（256K × 32位× 2組同步圖形RAM）的
文件頁(yè)數(shù)： 23/49頁(yè)
文件大?。?/td> 934K
代理商： KM4132G512
KM4132G512
CMOS SGRAM
- 24
Rev. 2.2 (June 1998)
12. About Burst Type Control
Basic
MODE
Sequential Counting
At MRS A
3
= "0". See the BURST SEQUENCE TABLE. (BL=4,8)
BL=1, 2, 4, 8 and full page wrap around.
Interleave Counting
At MRS A
3
= "1". See the BURST SEQUENCE TABLE. (BL=4,8)
BL=4, 8. At BL=1, 2 Interleave Counting = Sequential Counting
Pseudo-
MODE
Pseudo-
Decrement Sequential
Counting
At MRS A
3
= "1".(See to Interleave Counting Mode)
Starting Address LSB 3 bits A
0-2
should be "000" or "111".@BL=8.
-- if LSB="000" : Increment Counting.
-- if LSB="111" : Decrement Counting.
For Example,(Assume Addresses except LSB 3 bits are all 0, BL=8)
-- @ write, LSB="000", Accessed Column in order 0-1-2-3-4-5-6-7
-- @ read, LSB="111", Accessed Column in order 7-6-5-4-3-2-1-0
At BL=4, same applications are possible. As above example, at Interleave Counting mode,
by confining starting address to some values,
Pseudo
-Decrement Counting Mode can be
realized. See the BURST SEQUENCE TABLE carefully.
Pseudo-
Binary Counting
At MRS A
3
= "0".(See to Sequential Counting Mode)
A
0-2
= "111".(See to Full Page Mode)
Using Full Page Mode and Burst Stop Command, Binary Counting Mode can be realized.
-- @ Sequential Counting, Accessed Column in order 3-4-5-6-7-1-2-3(BL=8)
-- @
Pseudo
-Binary Counting,
Accessed Column in order 3-4-5-6-7-8-9-10(Burst Stop command)
Note. The next column address of 256 is 0.
Random
MODE
Random column Access
t
CCD
= 1 CLK
Every cycle Read/Write Command with random column address can realize
Random Column Access.
That is similar to Extended Data Out (EDO) Operation of conventional DRAM.
13. About Burst Length Control
Basic
MODE
1
At MRS A
2,1,0
= "000".
At auto precharge, t
RAS
should not be violated.
2
At MRS A
2,1,0
= "001".
At auto precharge, t
RAS
should not be violated.
4
8
At MRS A
2,1,0
= "010".
At MRS A
2,1,0
= "011".
Full Page
At MRS A
2,1,0
= "111".
Wrap around mode(Infinite burst length)should be stopped by burst stop,
RAS interrupt or CAS interrupt.
Special
MODE
BRSW
At MRS A
9
= "1".
Read burst =1, 2, 4, 8, full page/write Burst =1
At auto precharge of write, t
RAS
should not be violated.
Block Write
8 Column Block Write. LSB A0-2 are ignored. Burst length=1.
t
BWC
should not be violated.
At auto precharge, t
RAS
should not be violated.
Random
MODE
Burst Stop
t
BDL
= 1, Valid DQ after burst stop is 1, 2 for CL=2, 3 respectively
Using burst stop command, it is possible only at full page burst length.
Interrupt
MODE
RAS Interrupt
(Interrupted by Precharge)
Before the end of burst, Row precharge command of the same bank
stops read/write burst with Row precharge.
t
RDL
= 1 with DQM, valid DQ after burst stop is 1, 2 for CL= 2, 3 respectively
During read/write burst with auto precharge, RAS interrupt cannot be issued.
CAS Interrupt
Before the end of burst, new read/write stops read/write burst and starts new
read/write burst or block write.
During read/write burst with auto precharge, CAS interrupt can not be issued.
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