參數(shù)資料
型號: KM4132G512
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256K x 32Bit x 2 Banks Synchronous Graphic RAM(256K x 32位 x 2組同步圖形 RAM)
中文描述: 256 × 32Bit的× 2銀行同步圖形存儲器(256K × 32位× 2組同步圖形RAM)的
文件頁數(shù): 16/49頁
文件大?。?/td> 934K
代理商: KM4132G512
KM4132G512
CMOS SGRAM
- 17
Rev. 2.2 (June 1998)
SUMMARY OF 2M Byte SGRAM BASIC FEATURES AND BENEFITS
Features
256K x 32 x 2 SGRAM
Benefits
Interface
Synchronous
Better interaction between memory and system without wait-state of
asynchronous DRAM.
High speed vertical and horizontal drawing.
High operating frequency allows performance gain for SCROLL, FILL,
and BitBLT.
Bank
2 ea
Pseudo-infinite row length by on-chip interleaving operation.
Hidden row activation and precharge.
Page Depth / 1 Row
256 bit
High speed vertical and horizontal drawing.
Total Page Depth
2048 bytes
High speed vertical and horizontal drawing.
Burst Length(Read)
1, 2, 4, 8 Full Page
Programmable burst of 1, 2, ,4, 8 and full page transfer per column
addresses.
Burst Length(Write)
1, 2, 4, 8 Full Page
Programmable burst of 1, 2, ,4, 8 and full page transfer per column
addresses.
BRSW
Switch to burst length of 1 at write without MRS.
Burst Type
Sequential & Interleave
Compatible with Intel and Motorola CPU based system.
CAS Latency
2, 3
Programmable CAS latency.
Block Write
8 Columns
High speed FILL, CLEAR, Text with color registers.
Maximum 32 byte data transfers(e.g. for 8bpp : 32 pixels) with plane and
byte masking functions.
Color Register
1 ea.
A and B bank share.
Mask Register
1 ea.
Write-per-bit capability(bit plane masking). A and B banks share.
Mask function
DQM
0-3
Byte masking(pixel masking for 8bpp system) for data-out/in
Write per bit
Each bit of the mask register directly controls a corresponding bit plane.
Pixel Mask at Block Write
Byte masking(pixel masking for 8bpp system) for color by DQi
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