參數(shù)資料
型號(hào)： ISP1562
廠商： NXP Semiconductors N.V.
英文描述： Hi-Speed Universal Serial Bus PCI Host Controller
中文描述： 高速通用串行總線PCI主機(jī)控制器
文件頁(yè)數(shù)： 68/98頁(yè)
文件大?。?/td> 442K
代理商： ISP1562
9397 750 14223
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
68 of 98
Philips Semiconductors
ISP1562
USB PCI Host Controller
[1]
The reserved bits should always be written with the reset value.
Table 94:
Address: Value read from func2 of address 10h + 24h
Bit
31
Symbol
Reset
0
Access
R/W
Bit
23
Symbol
Reset
0
Access
R/W
Bit
15
Symbol
ASS
Reset
0
Access
R
Bit
7
Symbol
reserved
[1]
USBSTS - USB Status register bit allocation
30
29
28
27
26
25
24
reserved
[1]
0
0
0
0
0
0
0
R/W
22
R/W
21
R/W
20
R/W
19
R/W
18
R/W
17
R/W
16
reserved
[1]
0
0
0
0
0
0
0
R/W
14
PSSTAT
0
R
6
R/W
13
RECL
0
R
5
IAA
R/W
12
HCH
1
R
4
HSE
R/W
11
R/W
10
R/W
9
R/W
8
reserved
[1]
0
0
0
0
R/W
3
FLR
R/W
2
PCD
R/W
1
USB
ERRINT
0
R/W
R/W
0
USBINT
Reset
Access
0
0
0
R
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 95:
Address: Value read from func2 of address 10h + 24h
Bit
Symbol
Description
31 to 16
reserved
-
15
ASS
Asynchronous Schedule Status
: Default = 0. The bit reports the
current real status of the asynchronous schedule. If this bit is logic 0,
the status of the asynchronous schedule is disabled. If this bit is logic 1,
the status of the asynchronous schedule is enabled. The Host
Controller is not required to immediately disable or enable the
asynchronous schedule when software changes ASE (bit 5 in the
USBCMD register). When this bit and the ASE bit have the same value,
the asynchronous schedule is either enabled (1) or disabled (0).
14
PSSTAT
Periodic Schedule Status
: Default = 0. This bit reports the current
status of the periodic schedule. If this bit is logic 0, the status of the
periodic schedule is disabled. If this bit is logic 1, the status of the
periodic schedule is enabled. The Host Controller is not required to
immediately disable or enable the periodic schedule when software
changes PSE (bit 4) in the USBCMD register. When this bit and the
PSE bit have the same value, the periodic schedule is either enabled (1)
or disabled (0).
13
RECL
Reclamation
: Default = 0. This is a read-only status bit that is used to
detect an empty asynchronous schedule.
12
HCH
HCHalted
: Default = 1. This bit is logic 0 when RS (bit 0) in the
USBCMD register is logic 1. The Host Controller sets this bit to logic 1
after it has stopped executing because the RS bit is set to logic 0, either
by software or by the Host Controller hardware. For example, on an
internal error.
USBSTS - USB Status register bit description
相關(guān)PDF資料
PDF描述
ISP1562BE Hi-Speed Universal Serial Bus PCI Host Controller
ISP1581 Universal Serial Bus 2.0 high-speed interface device
ISP1581BD Universal Serial Bus 2.0 high-speed interface device
ISP1582 Hi-Speed Universal Serial Bus peripheral controller
ISP1582BS Hi-Speed Universal Serial Bus peripheral controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1562BE 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller
ISP1562BE,518 功能描述:USB 接口集成電路 USB 2.0 PCI HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1562BE,551 功能描述:USB 接口集成電路 USB 2.0 PCI HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1562BE,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1562BEGA 功能描述:IC USB HOST CTRL HI-SPD 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
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