參數(shù)資料
型號: ISP1562
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus PCI Host Controller
中文描述: 高速通用串行總線PCI主機控制器
文件頁數(shù): 57/98頁
文件大?。?/td> 442K
代理商: ISP1562
9397 750 14223
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
57 of 98
Philips Semiconductors
ISP1562
USB PCI Host Controller
[1]
The reserved bits should always be written with the reset value.
Table 82:
Address: Value read from func0 or func1 of address 10h + 50h
Bit
31
Symbol
CRWE
Reset
0
Access
R/W
Bit
23
Symbol
Reset
0
Access
R/W
Bit
15
Symbol
DRWE
Reset
0
Access
R/W
Bit
7
Symbol
Reset
0
Access
R/W
HcRhStatus - Host Controller Root Hub Status register bit allocation
30
29
28
27
26
25
24
reserved
[1]
0
R/W
19
0
0
0
0
0
0
R/W
22
R/W
21
R/W
20
R/W
18
R/W
17
CCIC
0
R/W
9
R/W
16
LPSC
0
R/W
8
reserved
[1]
0
0
0
0
0
R/W
14
R/W
13
R/W
12
R/W
11
R/W
10
reserved
[1]
0
R/W
3
0
0
0
0
0
0
R/W
6
R/W
5
R/W
4
R/W
2
R/W
1
OCI
0
R
R/W
0
LPS
0
RW
reserved
[1]
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Table 83:
Address: Value read from func0 or func1 of address 10h + 50h
Bit
Symbol
Description
31
CRWE
On write—
ClearRemoteWakeupEnable
:
0 —
No effect
1 —
Clears DRWE (DeviceRemoteWakeupEnable).
30 to 18 reserved
-
17
CCIC
OverCurrentIndicatorChange
: This bit is set by hardware when a change
has occurred to the OCI bit of this register.
0 —
No effect
1 —
The HCD clears this bit.
16
LPSC
On read—
LocalPowerStatusChange
: The Root Hub does not support the
local power status feature. Therefore, this bit is always logic 0.
On write—
SetGlobalPower
: In global power mode
(PowerSwitchingMode = 0), logic 1 is written to this bit to turn on power to
all ports (clear PortPowerStatus). In per-port power mode, it sets
PortPowerStatus only on ports whose PortPowerControlMask bit is not set.
Writing logic 0 has no effect.
15
DRWE
On read—
DeviceRemoteWakeupEnable
: This bit enables
bit ConnectStatusChange (CSC) as a resume event, causing a state
transition from USBSUSPEND to USBRESUME and setting the
ResumeDetected interrupt.
0 —
CSC is not a remote wake-up event
1 —
CSC is a remote wake-up event.
On write—
SetRemoteWakeupEnable
: Writing logic 1 sets DRWE
(DeviceRemoteWakeupEnable). Writing logic 0 has no effect.
HcRhStatus - Host Controller Root Hub Status register bit description
相關(guān)PDF資料
PDF描述
ISP1562BE Hi-Speed Universal Serial Bus PCI Host Controller
ISP1581 Universal Serial Bus 2.0 high-speed interface device
ISP1581BD Universal Serial Bus 2.0 high-speed interface device
ISP1582 Hi-Speed Universal Serial Bus peripheral controller
ISP1582BS Hi-Speed Universal Serial Bus peripheral controller
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