參數(shù)資料
型號(hào)： HYB18L128160BF-75
廠商： INFINEON TECHNOLOGIES AG
英文描述： ECONOLINE: RKZ - Safety standards and approvals: EN 60950 certified, rated for 250VAC (LVD test report)- Custom Solutions Available- 3kVDC & 4kVDC Isolation- UL94V-0 Package Material- Power Sharing on Output- Efficiency to 84%
中文描述： 針對(duì)移動(dòng)應(yīng)用的DRAM
文件頁(yè)數(shù)： 38/53頁(yè)
文件大?。?/td> 1328K
代理商： HYB18L128160BF-75
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Functional Description
Data Sheet
38
V1.4, 2004-04-30
2.4.8.2
A READ or WRITE burst with Auto Precharge enabled can be interrupted by a subsequent READ or WRITE
command issued to a different bank.
Figure 37
shows a READ with Auto Precharge to bank n, interrupted by a READ (with or without Auto Precharge)
to bank m. The READ to bank m will interrupt the READ to bank n, CAS latency later. The precharge to bank n
will begin when the READ to bank m is registered.
Figure 38
shows a READ with Auto Precharge to bank n, interrupted by a WRITE (with or without Auto Precharge)
to bank m. The precharge to bank n will begin when the WRITE to bank m is registered. DQM should be pulled
HIGH two clock cycles prior to the WRITE to prevent bus contention.
Figure 39
shows a WRITE with Auto Precharge to bank n, interrupted by a READ (with or without Auto Precharge)
to bank m. The precharge to bank n will begin
t
WR
after the new command to bank m is registered. The last valid
data-in to bank n is one clock cycle prior to the READ to bank m.
Figure 40
shows a WRITE with Auto Precharge to bank n, interrupted by a WRITE (with or without Auto
Precharge) to bank m. The precharge to bank n will begin
t
WR
after the WRITE to bank m is registered. The last
valid data-in to bank n is one clock cycle prior to the WRITE to bank m.
CONCURRENT AUTO PRECHARGE
Figure 37
READ with Auto Precharge Interrupted by READ
Figure 38
READ with Auto Precharge Interrupted by WRITE
RD-AP = Read with Auto Precharge; READ = Read with or without Auto Precharge
CL = 2 and Burst Length = 4 in the case shown
Read with Auto Precharge to bank n is interrupted by subsequent Read to bank m
= Don't Care
CL=2
CLK
Command
RD-AP
NOP
NOP
NOP
READ
NOP
NOP
NOP
Address
Bank n
Col b
Bank m
Col x
DQ
DO b+1
DO b
DO x
DO x+1
DO x+2
t
RP
(bank n)
RD-AP = Read with Auto Precharge; WRITE = Write with or without Auto Precharge
CL = 2 and Burst Length = 4 in the case shown
Read with Auto Precharge to bank n is interrupted by subsequent Write to bank m
= Don't Care
CL=2
DQM
CLK
Command
NOP
RD-AP
NOP
NOP
NOP
NOP
WRITE
NOP
Address
Bank m
Col x
Bank n
Col b
DQ
DO b
DI x+1
DI x+2
DI x+3
DI x
t
RP
(bank n)
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